Trigate TiN nanocrystal memory with high-k blocking dielectric and high work function gate electrode

Electrochemical and Solid-State Letters

Volumn 12, Issue 3, 2009, Pages

  Lu, Chi Pei ^a   Tsui, Bing Yue ^b   Luo, Cheng Kei ^a   Lin, Cha Hsin ^b   Tzeng, Pei Jer ^b   Wang, Ching Chiun ^b   Tsai, Ming Jinn ^b  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

^b INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

DIELECTRIC MATERIALS; NANOCRYSTALLINE ALLOYS; NANOCRYSTALS; OZONE WATER TREATMENT; POLYSILICON; SEMICONDUCTOR STORAGE; TIN; TITANIUM COMPOUNDS; TITANIUM NITRIDE; WINDOWS;

CHARGE LOSSES; DIELECTRIC LAYERS; GATE ELECTRODES; HIGH WORK FUNCTIONS; MEMORY PROPERTIES; MEMORY WINDOWS; METAL NANOCRYSTALS; NONVOLATILE MEMORIES; ROOM TEMPERATURES; SILICON ON INSULATORS; TIN NANOCRYSTALS; TRANSISTOR PERFORMANCES; TRIGATE STRUCTURES; WINDOW SHIFTS;

DATA STORAGE EQUIPMENT;

EID: 58149512446     PISSN: 10990062     EISSN: None     Source Type: Journal    
DOI: 10.1149/1.3054304     Document Type: Article

References (15)

1. International Technology Roadmap for Semiconductors, p. 35, Semiconductors Industry Association, San Jose, CA (2007).
2. J. D. Blauwe, IEEE Trans. Nanotechnol., 1, 72 (2002).
3. T. Osabe, T. Ishii, T. Mine, T. Sano, T. Arigane, T. Fukumura, H. Kurata, S. Saeki, Y. Ikeda, and K. Yano, IEEE Trans. Very Large Scale Integr. (VLSI) Syst., 2004, 242.
4. M. L. Ostraat, J. W. De Blauwe, M. L. Green, L. D. Bell, M. L. Brongersma, J. Casperson, R. C. Flagan, and H. A. Atwater, Appl. Phys. Lett., 79, 433 (2001).
5. Z. Liu, C. Lee, V. Narayanan, G. Pei, and E. C. Kan, IEEE Trans. Electron Devices, 49, 1606 (2002).
6. T.-H. Hou, C. Lee, V. Narayanan, U. Ganguly, and E. C. Kan, IEEE Trans. Electron Devices, 53, 3095 (2006).
7. J. J. Lee and D.-L. Kwong, IEEE Trans. Electron Devices, 52, 507 (2005).
8. Y. J. Ahn, J.-D. Choe, J. J. Lee, D. Choi, E. S. Cho, B. Y. Choi, S.-H. Lee, S. K. Sung, C.-H. Lee, S. H. Cheong, IEEE Trans. Very Large Scale Integr. (VLSI) Syst., 2006, 88.
9. F. Hofmann, M. Specht, U. Dorda, R. Kömmling, L. Dreskorndeld, J. Kretz, M. Städele, W. Rösner, and L. Risch, Solid-State Electron., 49, 1799 (2005).
10. M. Specht, U. Dorda, L. Dreeskornfeld, J. Kretz, F. Hofmann, M. Städele, R. J. Luyken, W. Rösner, H. Reisinger, E. Landgraf, IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 2004, 1083.
11. P. Xuan, M. She, B. Harteneck, A. Liddle, J. Bokor, and T.-J. King, Tech. Dig.-Int. Electron Devices Meet., 2003, 609.
12. K. Yanagidaira, M. Saitoh, and T. Hiramoto, IEEE Electron Device Lett., 26, 473 (2005).
13. C. H. Lee, K. I. Choi, M. K. Cho, Y. H. Song, K. C. Park, and K. Kim, Tech. Dig.-Int. Electron Devices Meet., 2003, 613.
14. S. Maikap, P. J. Tzeng, H. Y. Lee, C. C. Wang, T. C. Tien, L. S. Lee, and M.-J. Tsai, Appl. Phys. Lett., 91, 043114 (2007).
15. C. P. Lu, C. K. Luo, B. Y. Tsui, C. H. Lin, P. J. Tzeng, C. C. Wang, H. Y. Lee, D. Y. Wu, and M.-J. Tsai, International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA), Industrial Technology Research Institute, Taiwan, p. 62 (2007).