Fabrication and characterization of a double quantum dot structure

Journal of Nanoscience and Nanotechnology

Volumn 8, Issue 10, 2008, Pages 5009-5013

  Jung, Young Chai ^a   Kim, Duk Soo ^a   Hong, Byoung Hak ^a   Cho, Keun Hwi ^a   Hwang, Sung Woo ^a   Ann, David ^b   Yu, Yun Seop ^c   Choi, Bum Ho ^d  

^a Korea University   (South Korea)

^b University of Seoul   (South Korea)

^c Hankyong National University   (South Korea)

^d Korea Institute of Industrial Technology   (South Korea)

Author keywords

CMOS; Poly silicon; Quantum dot; Sidewall spacer

Indexed keywords

CMOS; CMOS PROCESSING; COULOMB DIAMONDS; COULOMB OSCILLATIONS; DOUBLE QUANTUM DOTS; MEASURED RESULTS; NEGATIVE BIASES; PEAK SPLITTING; QUANTUM DOT; SIDEWALL SPACER; SIMULATION BASED; SINGLE ELECTRON TUNNELING;

CURRENT VOLTAGE CHARACTERISTICS; DIAMONDS; ELECTRON TUNNELING; OPTICAL WAVEGUIDES; POLYSILICON; QUANTUM ELECTRONICS;

SEMICONDUCTOR QUANTUM DOTS;

EID: 58149234333     PISSN: 15334880     EISSN: None     Source Type: Journal    
DOI: 10.1166/jnn.2008.1315     Document Type: Conference Paper

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