Automatic generation of geometrically parameterized reduced order models for integrated spiral RF-inductors

Proceedings of the IEEE International Workshop on Behavioral Modeling and Simulation, BMAS

Volumn 2003-January, Issue , 2003, Pages 18-23

  Daniel, L ^a   White, J K ^a  

^a USA   (United States)

Author keywords

Design optimization; Geometry; Inductors; Integral equations; Permission; Radio frequency; Reduced order systems; Semiconductor process modeling; Solid modeling; Spirals

Indexed keywords

BEHAVIORAL RESEARCH; CONTROL EQUIPMENT; ELECTRIC INDUCTORS; GEOMETRY;

DESIGN OPTIMIZATION; PERMISSION; RADIO FREQUENCIES; REDUCED ORDER SYSTEMS; SEMICONDUCTOR PROCESS MODELING; SOLID MODEL; SPIRALS;

INTEGRAL EQUATIONS;

EID: 57849110084     PISSN: 21603804     EISSN: 21603812     Source Type: Conference Proceeding    
DOI: 10.1109/BMAS.2003.1249851     Document Type: Conference Paper

References (26)

1. Y Liu, Lawrence T. Pileggi, and Andrzej J. Strojwas. Model order-reduction of RCL interconnect including variational analysis. In Proc. of the ACM/IEEE Design Automation Conference, pages 201-206, New Orleans, Louisiana, June 1999.
2. P. Heydari and M. Pedram. Model reduction of variable-geometry interconnects using variational spectrally-weighted balanced truncation. In Proc. of IEEE/ACM International Conference on Computer Aided-Design, San Jose, CA, November 2001.
3. S. Pullela, N. Menezes, and L.T. Pileggi. Moment-sensitivity-based wire sizing for skew reduction in on-chip clock nets. IEEE Trans. Computer-Aided Design, 16(2):210-215, February 1997.
4. C. Prud'homme, D. Rovas, K. Veroy, Y. Maday, A.T. Patera, and G. Turinici. Reliable real-time solution of parametrized partial differential equations: Reduced-basis output bounds methods. Journal of Fluids Engineering, 2002.
5. K. Gallivan, E. Grimme, and P. Van Dooren. Asymptotic Waveform Evaluation via a Lanczos Method. Applied Mathematics Letters, 7(5):75-80, 1994.
6. nd ACM/IEEE Design Automation Conference, pages 474-479, San Francisco, CA, June 1995.
7. K. J. Kerns, I. L. Wemple, and A. T. Yang. Stable and efficient reduction of substrate model networks using congruence transforms. In Proc. of IEEE/ACM International Conference on Computer Aided-Design, pages 207-214, San Jose, CA, November 1995.
8. Eric Grimme. Krylov Projection Methods for Model Reduction. PhD thesis, Coordinated-Science Laboratory, University of Illinois at Urbana-Champaign, Urbana-Champaign, IL, 1997.
9. I. M. Elfadel and David. L. Ling. A block rational arnoldi algorithm for multipoint passive model-order reduction of multiport RLC networks. In Proc. of IEEE/ACM International Conference on Computer Aided-Design, pages 66-71, San Jose, California, November 1997.
10. A. Odabasioglu, M. Celik, and L. T. Pileggi. PRIMA: passive reduced-order interconnect macromodeling algorithm. IEEE Trans. Computer-Aided Design, 17(8):645-654, August 1998.
11. L. M. Silveira, M. Kamon, I. Elfadel, and J. K. White. Coordinate-transformed arnoldi algorithm for generating guarantee stable reduced-order models of RLC. Computer Methods in Applied Mechanics and Engineering, 169(3-4):377-89, February 1999.
12. J. E. Bracken, D. K. Sun, and Z. Cendes. Characterization of electromagnetic devices via reduced-order models. Computer Methods in Applied Mechanics and Engineering, 169(3-4):311-330, February 1999.
13. A. C. Cangellaris and L. Zhao. Passive reduced-order modeling of electromagnetic systems. Computer Methods in Applied Mechanics and Engineering, 169(3-4):345-358, February 1999.
14. D. S. Weile, E. Michielssen, Eric Grimme, and K. Gallivan. A method for generating rational interpolant reduced order models of two-parameter linear systems. Applied Mathematics Letters, 12:93-102, 1999.
15. L. Daniel, C. S. Ong, S. C. Low, K. H. Lee, and J. K. White. Geometrically parameterized interconnect performance models for interconnect synthesis. In International Symposium in Physical Design, pages 202-207, San Diego, CA, USA, April 2002.
16. A. E. Ruehli. Equivalent circuit models for three dimensional multiconductor systems. IEEE Trans. on Microwave Theory and Techniques, 22:216-221, March 1974.
17. M. Kamon, N. Marques, and J. K. White. FastPep: a fast parasitic extraction program for complex three-dimensional geometries. In Proc. of the IEEE/ACM International Conference on Computer-Aided Design, pages 456-460, San Jose, CA, November 1997.
18. W. T. Weeks, L. L. Wu, M. F. McAllister, and A. Singh. Resistive and inductive skin effect in rectangular conductors. IBM J. Res. Develop., 23(6):652-660, November 1979.
19. M. Kamon, M. J. Tsuk, and J. K. White. FASTHENRY: A multipole-accelerated 3-D inductance extraction program. IEEE Trans. on Microwave Theory and Techniques, 42(9):1750-8, September 1994.
20. K. Nabors and J. K. White. FastCap: a multipole accelerated 3-d capacitance extraction program. IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, 10(11):1447-59, November 1991.
21. L. Daniel, A. Sangiovanni-Vincentelli, and J. K. White. Using conduction modes basis functions for efficient electromagnetic analysis of on-chip and off-chip interconnect. In Proc. of the IEEE/ACM Design Automation Conference, Las Vegas, June 2001.
22. L. Daniel, A. Sangiovanni-Vincentelli, and J. K. White. Techniques for including dielectrics when extracting passive low-order models of high speed interconnect. In Proc. of the IEEE/ACM International Conference on Computer-Aided Design, San Jose, CA, November 2001.
23. N. Marques, M. Kamon, J. K. White, and L. M. Silveira. A mixed nodal-mesh formulation for efficient extraction and passive reduced-order modeling of 3D interconnects. In Proc. of the IEEE/ACM Design Automation Conference, pages 297-302, San Francisco, CA, June 1998.
24. M. Kamon, N. Marques, L. M. Silveira, and J. K. White. Automatic generation of accurate circuit models. IEEE Trans. on Components, Packaging, and Manufact. Tech., August 1998.
25. Mattan Kamon. Fast Parasitic Extraction and Simulation of Three-dimensional Interconnect via Quasistatic Analysis. PhD thesis, Massachusetts Institute of Technology, Cambridge, MA, January 1998.
26. rd ACM/IEEE Design Automation Conference, pages 377-382, Las Vegas, Nevada, June 1996.