Geometrically parameterized interconnect performance models for interconnect synthesis

Proceedings of the International Symposium on Physical Design

Volumn , Issue , 2002, Pages 202-207

  Daniel, Luca ^a   Ong, Chin Siong ^a   Low, Sok Chay ^a   Lee, Kwok Hong ^a   White, Jacob ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Interconnect synthesis; Parametrized model order reduction

Indexed keywords

ALGORITHMS; COMPUTATIONAL GEOMETRY; CROSSTALK; INTERCONNECTION NETWORKS; MATHEMATICAL MODELS; PARAMETER ESTIMATION;

INTERCONNECT SYNTHESIS;

INTEGRATED CIRCUIT LAYOUT;

EID: 0036375927     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/505433.505436     Document Type: Conference Paper

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