A parallel and randomized algorithm for large-scale discrete dual-Vt assignment and continuous gate sizing

Proceedings of the International Symposium on Low Power Electronics and Design

Volumn , Issue , 2008, Pages 45-50

  Wu, Tai Hsuan ^a   Xie, Lin ^a   Davoodi, Azadeh ^a  

^a UNIVERSITY OF WISCONSIN MADISON   (United States)

Author keywords

Large scale mixed mode optimization; Power optimization

Indexed keywords

AVERAGE POWER; COMBINATORIAL OP-TIMIZATION PROBLEMS; CONVEX PROGRAMS; DISCRETIZATION; GATE SIZINGS; HYBRID ALGORITHMS; LARGE-SCALE MIXED-MODE OPTIMIZATION; LOCAL MINIMUMS; LOW POWER DESIGN TECHNIQUES; NUMBER OF ITERATIONS; POWER IMPROVEMENTS; POWER OPTIMIZATION; QUALITY OF SOLUTIONS; RANDOM SAMPLINGS; RANDOMIZED ALGORITHMS; RUN-TIME; SOLUTION SPACES;

ALGORITHMS; BENCHMARKING; COMBINATORIAL MATHEMATICS; COMBINATORIAL OPTIMIZATION; ELECTRIC POWER SUPPLIES TO APPARATUS; GATES (TRANSISTOR); IMAGE CODING; LOW POWER ELECTRONICS; PARALLEL ALGORITHMS; POWER ELECTRONICS;

OPTIMIZATION;

EID: 57549087959     PISSN: 15334678     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1393921.1393937     Document Type: Conference Paper

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