RF design methodology for design-cycle-time reduction using parameterization of embedded passives on multilayer organic substrates

IEEE MTT-S International Microwave Symposium Digest

Volumn , Issue , 2008, Pages 1397-1400

  Min, Sung Hwan ^a   Seo, Chung K ^a   Yepes, Ana M ^a   Ward, Chris ^a   Dalmia, Sidharth ^a   White, George ^a   Swaminathan, Madhavan ^a  

^a Jacket Micro Devices Inc   (United States)

Author keywords

Design cycle time; Multilayer organic; Parameterization; Quality factor; RF design

Indexed keywords

DESIGN CYCLE TIMES; EMBEDDED INDUCTORS; EMBEDDED PASSIVES; ORGANIC SUBSTRATES; PARAMETERIZED DESIGNS; PARASITICS; QUALITY FACTOR; RF DESIGN; RF DESIGNS; TIME REDUCTIONS;

BANDPASS FILTERS; MICROWAVES; MULTILAYERS; PRINTED CIRCUIT BOARDS; SUBSTRATES;

DESIGN;

EID: 57349167256     PISSN: 0149645X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MWSYM.2008.4633039     Document Type: Conference Paper

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