Automatic generation of modular multipliers for FPGA applications

IEEE Transactions on Computers

Volumn 57, Issue 12, 2008, Pages 1600-1613

  Beuchat, Jean Luc ^a   Muller, Jean Michel ^b  

^a UNIVERSITY OF TSUKUBA   (Japan)

^b UNIVERSITÉ DE LYON   (France)

Author keywords

FPGA; High radix carry save number system; Modular multiplication

Indexed keywords

ADDERS; COMPUTER HARDWARE DESCRIPTION LANGUAGES; CRYPTOGRAPHY; DIGITAL ARITHMETIC; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); PUBLIC KEY CRYPTOGRAPHY;

APPLICATIONS.; AUTOMATIC GENERATIONS; CONSTANT TIMES; FPGA; FPGA APPLICATIONS; HIGH-RADIX CARRY-SAVE NUMBER SYSTEM; MODULAR MULTIPLICATION; MODULAR MULTIPLICATIONS; MODULAR MULTIPLIERS; NUMBER SYSTEMS; REDUNDANT NUMBER SYSTEMS; VHDL DESCRIPTIONS;

CARRY LOGIC;

EID: 57049102841     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.2008.102     Document Type: Article

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