Fast algorithm for modular reduction

IEE Proceedings: Computers and Digital Techniques

Volumn 145, Issue 4, 1998, Pages 265-271

  Koc C K ^a   Hung, C Y ^b  

^a OREGON STATE UNIVERSITY   (United States)

^b TEXAS INSTRUMENTS   (United States)

Author keywords

Curry save adder; Division; Modular multiplication; Sign estimation technique

Indexed keywords

ADDERS; ALGORITHMS; COMPUTATIONAL COMPLEXITY; CRYPTOGRAPHY; ESTIMATION; VLSI CIRCUITS;

MODULAR MULTIPLICATION; MODULAR REDUCTION ALGORITHM; SIGN ESTIMATION TECHNIQUE;

DIGITAL ARITHMETIC;

EID: 0032114934     PISSN: 13502387     EISSN: None     Source Type: Journal    
DOI: 10.1049/ip-cdt:19982091     Document Type: Article

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