Modulo M multiplication-addition: Algorithms and FPGA implementation

Electronics Letters

Volumn 40, Issue 11, 2004, Pages 654-655

  Beuchat, J L ^a   Muller, J M ^a  

^a UNIVERSITÉ DE LYON   (France)

Author keywords

[No Author keywords available]

Indexed keywords

ADDERS; ALGORITHMS; DIGITAL ARITHMETIC; DIGITAL CIRCUITS; PROBLEM SOLVING; THEOREM PROVING;

MODULAR MULTIPLICATION; RESIDUAL COMPUTATION; RESIDUE NUMBER SYSTEM (RNS); RIPPLE CARRY ADDERS (RCA);

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 2942726406     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:20040463     Document Type: Article

References (6)

1. Montgomery, P.: 'Modular multiplication without trial division', Math. Comput., 1985, 44, (170), pp. 519-521
2. Koç, C.K., and Hung, C.Y.: 'Carry-save adders for computing the product AB modulo N', Electron. Lett., 1990, 26, (13), pp. 899-900
3. Takagi, N., and Yajima, S.: 'Modular multiplication hardware algorithms with a redundant representation and their application to RSA cryptosystem', IEEE Trans. Comput., 1992, 41, (7), pp. 887-891
4. Jeong, Y.-J., and Burleson, W.P.: 'VLSI array algorithms and architectures for RSA modular multiplication', IEEE Trans. Very Large Scale Integr. Syst., 1997, 5, (2), pp. 211-217
5. Kim, S., and Sobelman, G.E.: 'Digit-serial modular multiplication using skew-tolerant domino CMOS'. Proc. IEEE Int. Conf. Acoustics, Speech and Signal Processing, 2001, (IEEE Computer Society, Arlington, VA, USA), Vol. 2, pp. 1173-1176
6. Beuchat, J.-L., and Muller, J.-M.: 'Opérateurs itératifs de multiplication-addition modulaire pour FPGA', Tech. 2003-40, Laboratoire de l'Informatique du Parallélisme, August 2003. Available at http:// www.ens-lyon.fr/LIP/Pub/Rapports/RR/RR2003/RR2003-40.ps.gz