Chimps: A c-level compilation flow for hybrid CPU-FPGA architectures

Proceedings - 2008 International Conference on Field Programmable Logic and Applications, FPL

Volumn , Issue , 2008, Pages 173-178

  Putnam, Andrew ^a   Bennett, Dave ^b   Dellinger, Eric ^b   Mason, Jeff ^b   Sundararajan, Prasanna ^b   Eggers, Susan ^a  

^a UNIVERSITY OF WASHINGTON   (United States)

^b XILINX INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AUTOMATICALLY GENERATES; FPGA ARCHITECTURES; FPGA COMPUTING PLATFORMS; GEOMETRIC MEANT; HIGH-PERFORMANCE COMPUTING; SOURCE CODE CHANGES; SPEED-UPS;

APPLICATIONS; CODES (SYMBOLS); FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

BENCHMARKING;

EID: 54949115901     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPL.2008.4629927     Document Type: Conference Paper

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