An improved reverse converter for the moduli set {2n - 1, 2 n, 2n + 1, 2n+1 - 1}

IEICE Electronics Express

Volumn 5, Issue 17, 2008, Pages 672-677

  Hosseinzadeh, Mehdi ^a   Molahosseini, Amir Sabbagh ^a   Navi, Keivan ^b  

^a ISLAMIC AZAD UNIVERSITY   (Iran)

^b SHAHID BEHESHTI UNIVERSITY   (Iran)

Author keywords

Residue number system; Reverse converter; VLSI architectures

Indexed keywords

NUMBERING SYSTEMS;

HARDWARE ARCHITECTURE; HARDWARE DESIGN; HIGH SPEED; MODULI SETS; RESIDUE NUMBER SYSTEM; REVERSE CONVERTERS; VLSI ARCHITECTURES;

ARCHITECTURE;

EID: 52649140557     PISSN: None     EISSN: 13492543     Source Type: Journal    
DOI: 10.1587/elex.5.672     Document Type: Article

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