BGA assembly process development for 45nm ELK CUP devices

Proceedings, 2008 International Conference on Electronic Packaging Technology and High Density Packaging, ICEPT-HDP 2008

Volumn , Issue , 2008, Pages

  Tseng, Andy ^a   Lin, Bryan ^b   Huang, Louie ^b   Hung, Mike ^b  

^a ASE (US) Inc   (United States)

^b ADVANCED SEMICONDUCTOR ENGINEERING INC   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

ARSENIC COMPOUNDS; ASSEMBLY; CHIP SCALE PACKAGES; CHLORINE COMPOUNDS; DIELECTRIC MATERIALS; ELECTRIC CURRENTS; ELECTRONIC EQUIPMENT MANUFACTURE; FORMING; MECHANICAL PROPERTIES; MOLDING; OPTIMIZATION; PROCESS ENGINEERING; SAWING; SPEED; TECHNOLOGY; WAFER BONDING; WIRE;

ASSEMBLY PROCESSING; BGA PACKAGES; BOND FORCE; BOND WIRES; CHIP SIZES; CIRCUIT-UNDER-PAD; EFFECTIVE PARAMETERS; ELECTRICAL PERFORMANCES; ELECTRONIC PACKAGING; FEEDING RATES; HIGH SPEEDS; HIGH-DENSITY PACKAGING; IC PACKAGING; INTER-LEVEL DIELECTRIC; INTERNATIONAL CONFERENCES; LOW-K DIELECTRICS; MASS-PRODUCTION; MOLDING PROCESSES; OPTIMIZED PROCESS; PROCESS TECHNOLOGIES; RELIABILITY TESTING; WAFER SAWING; WAFER THICKNESSES; WIRE BOND; WIRE BONDING;

ELECTRONICS PACKAGING;

EID: 52449130887     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICEPT.2008.4607051     Document Type: Conference Paper

References (13)

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