A 9.2 mW, 4-8 GHz resistive feedback CMOS LNA with 24.4 dB Gain, 2 dB noise figure, and 21.5 dBm Output IP3

2008 IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systms - Digest of Papers, SiRF

Volumn , Issue , 2008, Pages 34-37

  Perumana, Bevin G ^a,b   Zhan, Jing Hong C ^a,c   Taylor, Stewart S ^a   Carlton, Brent R ^a   Laskar, Joy ^b  

^a INTEL CORPORATION   (United States)

^b GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

^c RF Division   (Taiwan)

Author keywords

CMOS low noise amplifier; Feedback amplifiers

Indexed keywords

CMOS LNA; CMOS LOW NOISE AMPLIFIER; CMOS PROCESSING; DIE AREA; FEEDBACK AMPLIFIERS; FULLY INTEGRATED; ON-CHIP INDUCTORS; RESISTIVE FEEDBACK; RF SYSTEMS;

AMPLIFIERS (ELECTRONIC); AUDIO FREQUENCY AMPLIFIERS; CMOS INTEGRATED CIRCUITS; ELECTRONICS INDUSTRY; INTEGRATED CIRCUITS; LOW NOISE AMPLIFIERS; NOISE FIGURE; NONMETALS; RADIOFREQUENCY SPECTROSCOPY; SILICON;

MONOLITHIC INTEGRATED CIRCUITS;

EID: 52049120168     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SMIC.2008.15     Document Type: Conference Paper

References (8)

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