A 12 mW, 7.5 GHz bandwidth, inductor-less CMOS LNA for low-power, low-cost, multi-standard receivers

Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium

Volumn , Issue , 2007, Pages 57-60

  Perumana, Bevin G ^a,b   Zhan, Jing Hong C ^a,c   Taylor, Stewart S ^a   Laskar, Joy ^b  

^a INTEL CORPORATION   (United States)

^b GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

^c RF Division   (Taiwan)

Author keywords

CMOS low noise amplifier; Feedback amplifiers

Indexed keywords

BANDWIDTH; CMOS INTEGRATED CIRCUITS; ELECTRIC INDUCTORS; ELECTRIC POWER UTILIZATION; FEEDBACK AMPLIFIERS; NOISE FIGURE; SIGNAL RECEIVERS; TRANSCONDUCTANCE;

CURRENT-REUSE TRANSCONDUCTANCE; FEEDBACK LNA; MULTI-STANDARD RECEIVERS;

LOW NOISE AMPLIFIERS;

EID: 34748852465     PISSN: 15292517     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RFIC.2007.380832     Document Type: Conference Paper

References (4)

1. H. M. Adiseno and H. Olsson, "A 1.8-V Wide-Band CMOS LNA for Multiband MultiStandard Front-End Receiver," in Proc. ESSCIRC, pp. 141-144, 2003.
2. J-H. C. Zhan and S. Taylor, "A 5GHz Resistive-Feedback CMOS LNA for Low-Cost Multi-Standard Application," in IEEE ISSCC Dig. Tech. Papers, pp. 200-201, 2006.
3. W. Sansen, "Distortion in Elementary Transistor Circuits," IEEE Trans. Circuits Syst. II, vol. 46, no. 3, pp. 315-325, March 1999.
4. B. G. Perumana, J-H C. Zhan, S. Taylor, and J. Laskar, "A 0.5-6 GHz Improved Linearity, Resistive Feedback 90-nm CMOS LNA," Proc. IEEE Asian Solid-State Circuits Conference (A-SSCC), pp. 263-266, 2006.