An ESD-protected DC-to-6GHz 9.7mW LNA in 90nm digital CMOS

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2007, Pages 422-424

  Borremans, J ^a,b   Wambacq, P ^a,b   Linten, D ^a,b  

^a IMEC   (Belgium)

^b VRIJE UNIVERSITEIT BRUSSEL   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; CMOS INTEGRATED CIRCUITS; DIGITAL INTEGRATED CIRCUITS; ELECTROSTATIC DISCHARGE; GAIN CONTROL; NATURAL FREQUENCIES;

CMOS PROCESS; GAIN SELECTION;

LOW NOISE AMPLIFIERS;

EID: 34548815927     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2007.373474     Document Type: Conference Paper

References (5)

1. J.-H.C. Zhan and S. S. Taylor, "A 5 GHz Resistive-Feedback CMOS LNA for Low-Cost Multi-Standard Applications," ISSCC Dig. Tech. Papers, pp. 200-201, Feb., 2006.
2. F. Bruccoleri E.A.M. Klumperinck; and B. Nauta, "Wide-Band CMOS Low-Noise Amplifier Exploiting Thermal Noise Canceling,'' IEEE J. Solid-State Circuits, vol. 39, pp. 275-282, Feb., 2004.
3. S. B. Wang, A. M. Niknejad and R. W Broderson, "A Sub-mW 960-MHz Ultra-Wideband CMOS LNA," IEEE RFIC Symp. Dig. Papers, pp. 35-38, Jun., 2005.
4. st Ed, springer, 2005.
5. st Ed, Kluwer Academic Publishers, 1998.