A novel system-level on-chip resource allocation method for manycore architectures

Proceedings - IEEE Computer Society Annual Symposium on VLSI: Trends in VLSI Technology and Design, ISVLSI 2008

Volumn , Issue , 2008, Pages 99-104

  Theocharides, Theocharis ^a,c   Michael, Maria K ^a,c   Polycarpou, Marios ^a,c   Dingankar, Ajit ^b,c  

^a UNIVERSITY OF CYPRUS   (Cyprus)

^b INTEL CORPORATION   (United States)

^c IEEE

Author keywords

Chip multiprocessors; Manycore architectures; Networks on chip; Resource allocation

Indexed keywords

ARCHITECTURE; COMPUTER RESOURCE MANAGEMENT; ELECTRIC NETWORK TOPOLOGY; MANAGEMENT; PLANNING; RESOURCE ALLOCATION; TECHNOLOGY;

CHIP MULTIPROCESSORS; GENERAL-PURPOSE COMPUTING; MANYCORE ARCHITECTURES; NETWORKS ON CHIP; OFF-CHIP; ON CHIPS; ON-CHIP NETWORK; PERFORMANCE IMPROVEMENTS; PROCESSOR CORES; ROUND ROBINS; SYSTEM LEVELS; VLSI TECHNOLOGIES; WORK-LOAD DISTRIBUTION;

COMPUTER SYSTEMS;

EID: 52049118507     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISVLSI.2008.30     Document Type: Conference Paper

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