New self-aligned silicon nanowire transistors on bulk substrate fabricated by epi-free compatible cmos technology: Process integration, experimental characterization of carrier transport and low frequency noise

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2007, Pages 895-898

  Tian, Yu ^a   Huang, Ru ^a   Wang, Yiqun ^a   Zhuge, Jing ^a   Wang, Runsheng ^a   Liu, Jia ^a   Zhang, Xing ^a   Wang, Yangyuan ^a  

^a PEKING UNIVERSITY   (China)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC WIRE; ELECTRON DEVICES; LITHOGRAPHY; MOSFET DEVICES; NANOSTRUCTURED MATERIALS; NANOSTRUCTURES; NANOWIRES; NONMETALS; OPTICAL DESIGN; SILICON; TECHNOLOGY; TRANSISTORS;

BULK SILICON; BULK SUBSTRATES; CMOS TECHNOLOGIES; EXPERIMENTAL CHARACTERIZATION; LOW-FREQUENCY NOISE; PROCESS INTEGRATION; SELF-ALIGNED; SHORT-CHANNEL EFFECTS; SILICON NANOWIRE TRANSISTORS;

SUBSTRATES;

EID: 49249101232     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2007.4419094     Document Type: Conference Paper

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