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Volumn , Issue , 2008, Pages 1420-1423

A 256x256 separable transform CMOS imager

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUIT MANUFACTURE; MATHEMATICAL TRANSFORMATIONS; MATRIX ALGEBRA; NETWORKS (CIRCUITS); TECHNICAL PRESENTATIONS;

EID: 51749106565     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2008.4541694     Document Type: Conference Paper
Times cited : (2)

References (10)
  • 1
    • 0033280147 scopus 로고    scopus 로고
    • A 640x512 cmos image sensor with ultrawide dynamic range floating-point pixel-level adc
    • Dec
    • D. X. D. Yang, A. E. Gamal, B. Fowler, and H. Tian, "A 640x512 cmos image sensor with ultrawide dynamic range floating-point pixel-level adc," IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 34, no. 12, pp. 339-342, Dec. 1999.
    • (1999) IEEE JOURNAL OF SOLID-STATE CIRCUITS , vol.34 , Issue.12 , pp. 339-342
    • Yang, D.X.D.1    Gamal, A.E.2    Fowler, B.3    Tian, H.4
  • 3
    • 1542301832 scopus 로고    scopus 로고
    • B. Pain, C. Sun, C. Wrigley, and G. Yang, Dynamically reconfigurable vision with high performance cmos active pixel sensors (aps), in Sensors, 2002. Proceedings of IEEE, 1, 12-14 June 2002, pp. 21-26vol.1.
    • B. Pain, C. Sun, C. Wrigley, and G. Yang, "Dynamically reconfigurable vision with high performance cmos active pixel sensors (aps)," in Sensors, 2002. Proceedings of IEEE, vol. 1, 12-14 June 2002, pp. 21-26vol.1.
  • 5
    • 0042251695 scopus 로고
    • A 590,000 transistor 48,000 pixel, contrast sensitive, edge enhancing, cmos imager-silicon retina
    • 27-29 March
    • A. Andreou and K. Boahen, "A 590,000 transistor 48,000 pixel, contrast sensitive, edge enhancing, cmos imager-silicon retina," in Advanced Research in VLSI, 1995. Proceedings., Sixteenth Conference on, 27-29 March 1995, pp. 225-240.
    • (1995) Advanced Research in VLSI, 1995. Proceedings., Sixteenth Conference on , pp. 225-240
    • Andreou, A.1    Boahen, K.2
  • 6
    • 33644659163 scopus 로고    scopus 로고
    • A. Bandyopadhyay, J. Lee, R. Robucci, and P. Hasler, Matia: a programmable 80 ìw/frame cmos block matrix transform imager architecture, Solid-State Circuits, IEEE Journal of, 41, no. 3, pp. 663-672, March 2006.
    • A. Bandyopadhyay, J. Lee, R. Robucci, and P. Hasler, "Matia: a programmable 80 ìw/frame cmos block matrix transform imager architecture," Solid-State Circuits, IEEE Journal of, vol. 41, no. 3, pp. 663-672, March 2006.
  • 9
    • 17044381727 scopus 로고    scopus 로고
    • R. Chawla, A. Bandyopadhyay, V. Srinivasan, and P. Hasler, A 531 nw/mhz, 128x32 current-mode programmable analog vector-matrix multiplier with over two decades of linearity, in Custom Integrated Circuits Conference, 2004. Proceedings of the IEEE 2004, 3-6 Oct. 2004, pp. 651-654.
    • R. Chawla, A. Bandyopadhyay, V. Srinivasan, and P. Hasler, "A 531 nw/mhz, 128x32 current-mode programmable analog vector-matrix multiplier with over two decades of linearity," in Custom Integrated Circuits Conference, 2004. Proceedings of the IEEE 2004, 3-6 Oct. 2004, pp. 651-654.
  • 10
    • 34247503687 scopus 로고    scopus 로고
    • Sub-microwatt analog vlsi trainable pattern classifier
    • 79, 2007/05
    • S. Chakrabartty and G. Cauwenberghs, "Sub-microwatt analog vlsi trainable pattern classifier," IEEE Journal of Solid-State Circuits, vol. 42, no. 5, pp. 1169 - 79, 2007/05/.
    • IEEE Journal of Solid-State Circuits , vol.42 , Issue.5 , pp. 1169
    • Chakrabartty, S.1    Cauwenberghs, G.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.