A 52mW 0.56mm2 1.2V 12b 120MS/s SHA-free dual-channel nyquist ADC based on mid-code calibration

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn , Issue , 2008, Pages 9-12

  Choi, Hee Cheol ^a   Kim, Young Ju ^a   Lee, Se Won ^a   Han, Jae Yeol ^a   Kwon, Oh Bong ^b   Kim, Younglok ^a   Lee, Seung Hoon ^a  

^a Sogang University   (South Korea)

^b MagnaChip Semiconductor Ltd   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS PROCESSING; CODE CALIBRATIONS; DIE AREA; INTERNATIONAL SYMPOSIUM;

MULTICARRIER MODULATION;

EID: 51749093760     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2008.4541341     Document Type: Conference Paper

References (8)

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2. C. Michalski, "A 12b 105Msample/s, 850mW analog to digital converter," in Symp. VLSI Circuits Dig. Tech. Papers, June, 2000, pp. 208-211.
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7. N. Kurosawa, H. Kobayashi, K. Maruyama, H. Sugawara, and K. Kobayashi, "Explicit Analysis of Channel Mismatch Effects in Time-Interleaved ADC Systems," IEEE J. Trans. on Circuits and Systems I, vol. 48, no. 3, pp. 261-271, Mar., 2001.
8. H. C. Choi, J. H. Kim, S. M. Yoo, K. J. Lee, T. H. Oh, M. J. Seo, and J. W. Kim, "A 15mW 0.2mm2 10b 50MS/s ADC with Wide Input Range, " ISSCC Dig. Tech. Papers, pp. 226-227, Feb., 2006.