Why should we do 3D integration?

Proceedings - Design Automation Conference

Volumn , Issue , 2008, Pages 674-675

  Haensch, Wilfried ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

3D integration; Many core systems; Memory sub system

Indexed keywords

3D INTEGRATION; MANY CORE SYSTEMS; MEMORY SUB SYSTEM;

COMPUTER NETWORKS; DIGITAL INTEGRATED CIRCUITS; INDUSTRIAL ENGINEERING;

COMPUTER AIDED DESIGN;

EID: 51549091255     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DAC.2008.4555904     Document Type: Conference Paper

References (10)

1. G. Moore, "Cramming more components onto integrated circuits," Electronics 38, 114-117 (1965).
2. R. H. Dennard et al., "Design of ion-implanted MOSFETs with very small physical dimensions," IEEE 1. SolidState Circuits, SC-9, pp. 256-268, 1974
3. W. Haensch et al. "Silicon CMOS devices beyond scaling" IBM J. RES. & DEV. VOL. 50 NO. 4/5 (2006)
4. P. Emma, "How is bandwidth used in computers? Why bandwidth is the next major hurdle in computer systems evolution and what technologies will emerge to address the bandwidth problem," in High-Performance Energy-Efficient Microprocessor Design, pp. 235-287, Springer, (2006).
5. S. Iyer et al., "Embedded DRAM: technology platform for the Blue Gene/L chip," IBM J. Res. & Dev. 49, 333-350 (2005).
6. A. Topol et al., "Three-dimensional integrated circuits" IBM J. RES. & DEV. VOL. 50 NO. 4/5 (2006)
7. U. Knickerbocker et al. "Development of next-generation system-on-package (SOP) technology based on silicon carriers with fine-pitch chip interconnection," IBM J. RES. & DEV. VOL. 49 NO. 4/5 (2005)
8. J. A. Davis et al., "Interconnect Limits on Gigascale Integration (GSI) in the 21st Century," Proc. IEEE 89, 305 (2001).
9. B. Black et al., "Die Stacking (3D) Microarchitecture," International Symposium on Microarchitecture Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture, pp 469-479 (2006)
10. S. Koester et al., "Wafer-Level Three-Dimensional Integration Technology," IBM J. RES. & DEV. VOL. 52 NO. 6, to be published