Disc-like copper vias fabricated in a silicon wafer: Design for reliability

Proceedings - Electronic Components and Technology Conference

Volumn , Issue , 2008, Pages 1664-1666

  Suhir, Ephraim ^a,b,c,d   Savastiouk, Sergey ^e  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b UNIVERSITY OF MARYLAND   (United States)

^c ERS CO   (United States)

^d ALLVIA Inc ^*  (United States)

^e ALLVIA Inc   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DESIGN FOR RELIABILITY; ELASTIC STABILITY; ELECTRONIC COMPONENTS; ELEVATED TEMPERATURES;

COMPUTER NETWORKS; COPPER; SILICON;

SILICON WAFERS;

EID: 51349167853     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECTC.2008.4550201     Document Type: Conference Paper

References (6)

1. Witarsa, D., et al, "Through wafer copper via for silicon based SiP application", 7-th EPTC, 2005.
2. Okoro, C., et al, "Prediction of the Influence of Induced Stresses in Silicon on CMOS Performance in a Cu-Through-Via Interconnect Technology", EuroSime, 2007.
3. Tanaka, N., et al, "Mechanical effects of copper through-vias in a 3D die-stacked module", 52-nd ECTC, 2002
4. Worwag, W.; Dory, T., "Copper Via Plating in Three Dimensional Interconnects", 57-th ECTC, 2007.
5. E.Suhir, "Structural Analysis in Microelectronics and Fiber Optics", Van-Nostrand, 1991.
6. E.Suhir, "Applied Probability for Engineers and Scientists", McGraw-Hill, 1997.