Copper via plating in three dimensional interconnects

Proceedings - Electronic Components and Technology Conference

Volumn , Issue , 2007, Pages 842-846

  Worwag, Wojciech ^a   Dory, Tom ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

SILICON SUBSTRATES; WAFER SURFACE;

PHOTORESISTS; PLATING; SILICON; SUBSTRATES;

INTERCONNECTION NETWORKS;

EID: 35348913683     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECTC.2007.373896     Document Type: Conference Paper

References (10)

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