A simple power-aware scheduling for multicore systems when running real-time applications

IPDPS Miami 2008 - Proceedings of the 22nd IEEE International Parallel and Distributed Processing Symposium, Program and CD-ROM

Volumn , Issue , 2008, Pages

  Bautista, Diana ^a   Sahuquillo, Julio ^a   Hassan, Houcine ^a   Petit, Salvador ^a   Duato, José ^a  

^a UNIVERSITAT POLITÈCNICA DE VALÈNCIA   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

CHLORINE COMPOUNDS; COMPUTER NETWORKS; DISTRIBUTED PARAMETER NETWORKS; EMBEDDED SYSTEMS; ENERGY CONSERVATION; ENERGY POLICY; JAVA PROGRAMMING LANGUAGE; SCHEDULING;

MULTI-CORE PROCESSORS; MULTI-THREADED; PARALLEL AND DISTRIBUTED PROCESSING;

REAL TIME SYSTEMS;

EID: 51049084887     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IPDPS.2008.4536220     Document Type: Conference Paper

References (31)

1. T. AlEnawy and H. Aydin. Energy-aware task allocation for rate monotonic scheduling. In Proceedings of the 11th IEEE Real Time on Embedded Technology and Applications Symposium, pages 213-223, Washington, DC, USA, 2005. IEEE Computer Society.
2. A. Anantaraman, K. Seth, K. Patil, E. Rotenberg, and F. Mueller. Virtual simple architecture (visa): Exceeding the complexity limit in safe real-time systems. In Proceedings of the 30th International Symp. On Computer Architecture, pages 350-361, 2003.
3. J. Anderson and S. Baruah. Energy-efficient synthesis of periodic task systems upon identical multiprocessor platforms.
4. H. Aydin and Q. Yang. Energy-aware partitioning for multiprocessor real-time systems. Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS'03), Workshop on Parallel and Distributed Real-Time Systems, 2003.
5. F. J. Cazorla, P. M. Knijnenburg, R. Sakellariou, E. Fernández, A. Ramirez, and M. Valero. Predictable performance in smt processors: Synergy between the os and smts. IEEE TRANSACTIONS ON COMPUTERS, 55(7), 2006.
6. E. M. B. Consortium. Automotive and telecomunication benchmark suites. Technical report, [Online]. Available: http://www.eembc.org/.
7. I. Corp. Intel-xeon. Technical report, [Online]. Available: http://www.intel.com/products/processor/xeon.
8. T. Corp. Transmeta crusoe. Technical report, [Online]. Available: http://www.transmeta.com.
9. A. Corporation. Amd duron tm. Technical report, [Online]. Available: http://www.amd.com.
10. J. Donald and M. Martonosi. Techniques for multicore thermal management: Classification and new exploration. In ISCA '06: Proceedings of the 33rd annual international symposium on Computer Architecture, pages 78-88, Washington, DC, USA, 2006. IEEE Computer Society.
11. A. El-Haj-Mahmoud, A. S. AL-Zawawi, A. Anantaraman, and E. Rotenberg. Virtual multiprocessor: an analyzable, high-performance architecture for real-time computing. In Proceedings of the 2005 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, pages 213-224, New York, NY, USA, 2005. ACM.
12. G. Hinton and D. S. M. U. et al. The microarchitecture of the pentium 4 processor. intel technology journal. 2001.
13. K. Hirata and J. Goodacre. Arm mpcore; the streamlined and scalable arm11 processor core. Design Automation Conference, 2007. ASP-DAC '07. Asia and South Pacific, pages 747-748, Jan. 2007.
14. C.-M. Hung, J.-J. Chen, and T.-W. Kuo. Energy-efficient real-time task scheduling for a dvs system with a non-dvs processing element. In Proceedings of the 27th IEEE International Real-Time Systems Symposium, pages 303-312, 2006.
15. R. Kalla, B. Sinharoy, and J. Tendler. Ibm power5 chip: a dual-core multithreaded processor. Micro, IEEE, 24(2):40-47, Mar-Apr 2004.
16. P. Kongetira, K. Aingaran, and K. Olukotun. Niagara: a 32-way multithreaded sparc processor. Micro, IEEE, 25(2):21-29, March-April 2005.
17. K. Krewell. Pentium m hits the street. microprocessor report. Technical report, [Online]. Available: http://www.transmeta.com, March 2003.
18. C. Lee, M. Potkonjak, and W. Mangione-Smith. Mediabench: A tool for evaluating and synthesizing multimedia and communications systems. [Online]. Available: http://euler.slu.edu/fritts/mediabench/mb1/.
19. A. Limited. Arm11 mpcore processor. technical reference manual. Technical report, 2006.
20. M. Marinoni and G. Buttazzo. Elastic dvs management in processors with discrete voltage/frequency modes. IEEE Transactions on Industrial Informatics, 3(1), 2007.
21. C. McNairy and R. Bhatia. Montecito: a dual-core, dual-thread itanium processor. Micro, IEEE, 25(2):10-20, March-April 2005.
22. A. Qadi, S. Goddard, and S. Farritor. A dynamic voltage scaling algorithm for sporadic tasks. proceedings of the 24th IEEE Real-Time Systems Symp., Cancun, Mexico, pages 52-62, 2003.
23. V. Sharma, A. Thomas, T. F. Abdelzaher, K. Skadron, and Z. Lu. Power-aware qos management in web servers. In Proceedings of the 24th IEEE Real-Time Systems Symposium, Cancun, Mexico, pages 52-63, 2003.
24. M. R. time Research Center. Wcet analysis project. wcet benchmark programs. Technical report, [Online]. Available: http:/www.mrtc.mdh.se/projects/ wcet/benchmarks.html, 2006.
25. D. Tullsen, S. Eggers, and H. Levy. Simultaneous multithreading: Maximizing on-chip parallelism. Proceedings of the 22nd Annual International Symposium on Computer Architecture, pages 392-403, 22-24 Jun 1995.
26. R. Ubal, J. Sahuquillo, S. Petit, H. Hassan, and P. López. Power reduction in advanced embedded ipc processors. International Journal of Intelligent Automation and Soft Computing, Special Issue on Embedded System and Software for Intelligent Pervasive Computing(In Press).
27. R. Ubal, J. Sahuquillo, S. Petit, and P. López. A simulation framework to evaluate multicore-multithreaded processors. In Proceedings of the 19th International Symposium on Computer Architecture and High Performance Computing, 2007.
28. I. Ubicom. The ubicom ip3023 wireless network processor. Technical report, 2003.
29. M. Verma, L. Wehmeyer, and P. Marwedel. Cache-aware scratchpad-allocation algorithms for energy-constrained embedded systems. IEEE Transactions on CAD of Integrated Circuits and Systems, 25(10):2035-2051, 2006.
30. R. Watanabe, M. Kondo, M. Imai, H. Nakamura, and T. Nanya. Task scheduling under performance constraints for reducing the energy consumption of the gals multiprocessor soc. In Proceedings of the Design Automation and Test in Europe, 2007.
31. Y. Zhu and F. Mueller. Feedback edf scheduling of real-time tasks exploiting dynamic voltage scaling. Real-Time Systems Journal, 31(1-3):33-63, December 2005.