Dynamic measurement of critical-path timing

Proceedings - 2008 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT

Volumn , Issue , 2008, Pages 249-252

  Drake, Alan J ^a   Senger, Robert M ^b   Singh, Harmander ^c   Carpenter, Gary D ^a   James, Norman K ^d  

^a IBM AUSTIN RESEARCH LABORATORY   (United States)

^b IBM RESEARCH   (United States)

^c ADVANCED MICRO DEVICES   (United States)

^d IBM   (United States)

Author keywords

Calibration; Critical path monitor; DVFS

Indexed keywords

CALIBRATION; CRITICAL PATH DELAYS; CRITICAL PATH MONITOR; CRITICAL PATHS; DC VOLTAGES; DVFS; DYNAMIC MEASUREMENTS; HIGH-BANDWIDTH; INTEGRATED CIRCUIT DESIGN; INTERNATIONAL CONFERENCES; SCALING CONTROL; STANDARD DEVIATION; TEMPERATURE CHANGING; TIMING MARGINS;

ELECTRONICS INDUSTRY; INTEGRATED CIRCUIT MANUFACTURE; STANDARDS; TECHNOLOGY; TIME MEASUREMENT;

INTEGRATED CIRCUITS;

EID: 50849098042     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICICDT.2008.4567288     Document Type: Conference Paper

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