Reconfigurable logic element using a chaotic circuit

IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS

Volumn , Issue , 2006, Pages 1839-1842

  Murali, K ^a   Sinha, Sudeshna ^b   Ditto, William L ^c  

^a ANNA UNIVERSITY   (India)

^b INSTITUTE OF MATHEMATICAL SCIENCES   (India)

^c UNIVERSITY OF FLORIDA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHAOTIC SYSTEMS; DYNAMIC MODELS; LOGIC DEVICES; NETWORKS (CIRCUITS);

ASIA-PACIFIC; CHAOTIC CIRCUITS; DYNAMIC RE-CONFIGURATION; EXPERIMENTAL REALIZATION; LOGIC CELLS; ON-THE-FLY; RECONFIGURABLE LOGIC;

LOGIC CIRCUITS;

EID: 50249118167     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/APCCAS.2006.342196     Document Type: Conference Paper

References (9)

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