Implementation of NOR gate by a chaotic Chua's circuit

International Journal of Bifurcation and Chaos in Applied Sciences and Engineering

Volumn 13, Issue 9, 2003, Pages 2669-2672

  Murali, K ^a   Sinha, Sudeshna ^b   Ditto, William L ^c,d  

^a ANNA UNIVERSITY   (India)

^b INSTITUTE OF MATHEMATICAL SCIENCES   (India)

^c Control Dynamics Inc ^*  (United States)

^d UNIVERSITY OF FLORIDA   (United States)

Author keywords

Chaos; Circuit; Computing

Indexed keywords

COMPUTER ARCHITECTURE; DATA STORAGE EQUIPMENT; LOGIC GATES; NAND CIRCUITS;

CHAOTIC CIRCUITS;

CHAOS THEORY;

EID: 0242508464     PISSN: 02181274     EISSN: None     Source Type: Journal    
DOI: 10.1142/S0218127403008053     Document Type: Article

References (12)

1. Dmitriev, A. S., Panas, A. I., Starkov, S. O. & Kuzmin, L. V. [1997] "Experiments on RF band communications using chaos," Int. J. Bifurcation and Chaos 7, 2511-2527.
2. Lakshmanan, M. & Murali, K. [1994] Chaos in Nonlinear Oscillators: Controlling and Synchronization (World Scientific, Singapore).
3. Madan, R. N. [1993] Chua's Circuit: A Paradigm for Chaos, World Scientific Series on Nonlinear Science, Series B (World Scientific, Singapore).
4. Maddock, R. J. & Calcutt, D. M. [1997] Electronics: A Course for Engineers (Addison Wesley Longman Ltd., England).
5. Mano, M. M. [1993] Computer System Architecture, 3rd edition (Prentice Hall, Englewood Cliffs).
6. Munakata, T., Sinha, S. & Ditto, W. L. [2002] "Chaos computing: Implementation of fundamental logic gates by chaotic elements," IEEE Trans. Circuits Syst.-I 49, 1629-1633.
7. Murali, K. & Sinha, S. [2003] "Experimental realization of chaos control by thresholding," Phys. Rev. E68, 016210 [1-6].
8. Murali, K., Sinha, S. & Ditto, W. L. [2003] "Realization of the fundamental NOR gate using a chaotic circuit," Phys. Rev. E68, 016205 [1-5].
9. Sinha, S. & Ditto, W. L. [1998] "Dynamics based computation," Phys. Rev. Lett. 81, 2156-2159.
10. Sinha, S. & Ditto, W. L. [1999] "Computing with distributed chaos," Phys. Rev. E60, 363-377.
11. Sinha, S., Munakata, T. & Ditto, W. L. [2002a] "Flexible parallel implementation of logic gates using chaotic elements," Phys. Rev. E65, 036216 [1-9].
12. Sinha, S., Munakata, T. & Ditto, W. L. [2002b] "Parallel computing with extended dynamical systems," Phys. Rev. E65, 036214 [1-7].