Chaos computing: Implementation of fundamental logical gates by chaotic elements

IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications

Volumn 49, Issue 11, 2002, Pages 1629-1633

  Munakata, Toshinori ^a   Sinha, Sudeshna ^b   Ditto, William L ^c  

^a Cleveland State University   (United States)

^b INSTITUTE OF MATHEMATICAL SCIENCES   (India)

^c UNIVERSITY OF FLORIDA   (United States)

Author keywords

Chaos computing; New computing paradigm; One dimensional (1 D) chaotic systems

Indexed keywords

CHAOS THEORY; COMPUTER SIMULATION; DATA STORAGE EQUIPMENT; DIGITAL ARITHMETIC; INTEGRATED CIRCUIT LAYOUT; NAND CIRCUITS; ONE DIMENSIONAL;

CHAOS COMPUTING; LOGICAL GATES; ONE DIMENSIONAL CHAOTIC SYSTEMS;

LOGIC CIRCUITS;

EID: 0036857050     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2002.804551     Document Type: Article

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