Flexible parallel implementation of logic gates using chaotic elements

Physical Review E - Statistical Physics, Plasmas, Fluids, and Related Interdisciplinary Topics

Volumn 65, Issue 3, 2002, Pages

  Sinha, Sudeshna ^a   Munakata, Toshinori ^b   Ditto, William L ^c  

^a INSTITUTE OF MATHEMATICAL SCIENCES   (India)

^b Cleveland State University   (United States)

^c GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHAOTIC MAPS; FAST ELECTRONIC CIRCUITS; LOGICAL OPERATIONS; PROGRAMMABLE GATES;

CHAOS THEORY; COMPUTER ARCHITECTURE; DATA STORAGE EQUIPMENT; DNA; FUNCTIONS; PARALLEL PROCESSING SYSTEMS;

LOGIC GATES;

EID: 37649030639     PISSN: 1063651X     EISSN: None     Source Type: Journal    
DOI: 10.1103/PhysRevE.65.036216     Document Type: Article

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