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Volumn , Issue , 2006, Pages 233-236

Underfill selection for reducing Cu/low-K delamination risk of flip-chip assembly

Author keywords

[No Author keywords available]

Indexed keywords

CHIP SCALE PACKAGES; DELAMINATION; ELECTRONICS PACKAGING; FINITE ELEMENT METHOD; FLIP CHIP DEVICES; GLASS TRANSITION; NUMERICAL ANALYSIS; RISK ASSESSMENT; STEEL SHEET; TECHNOLOGY; TESTING; THERMAL CYCLING; THERMAL EXPANSION; THERMAL SPRAYING;

EID: 50249111688     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EPTC.2006.342721     Document Type: Conference Paper
Times cited : (14)

References (10)
  • 1
    • 0036287649 scopus 로고    scopus 로고
    • Thermal Stress and Debonding in Cu/low k Damascene Line Structures
    • San Diego, CA
    • nd Electr. Comp. Technol. Conf., San Diego, CA, 2002, pp. 859-864.
    • (2002) nd Electr. Comp. Technol. Conf , pp. 859-864
    • Du, Y.1
  • 2
    • 20344395335 scopus 로고    scopus 로고
    • Chip-packaging Interaction: A Critical Concern for Cu/low k Packaging
    • Wang, G. et al, "Chip-packaging Interaction: A Critical Concern for Cu/low k Packaging," Microelectr. Reliab., Vol. 45, No. 7-8 (2005), pp. 1079-1093.
    • (2005) Microelectr. Reliab , vol.45 , Issue.7-8 , pp. 1079-1093
    • Wang, G.1
  • 3
    • 84961718575 scopus 로고    scopus 로고
    • A Simulation Method for Predicting Packaging Mechanical Reliability with Low-k Dielectrics
    • San Francisco, CA
    • Mercado, L. et al, "A Simulation Method for Predicting Packaging Mechanical Reliability with Low-k Dielectrics," Proc. IEEE 2002 Int. Interconnect Technol. Conf., San Francisco, CA, 2002, pp. 119-121.
    • (2002) Proc. IEEE 2002 Int. Interconnect Technol. Conf , pp. 119-121
    • Mercado, L.1
  • 5
    • 28844500778 scopus 로고    scopus 로고
    • Effects of Underfill Materials on the Reliability of Low-K Flip-Chip Packaging
    • Chen, K. M. et al, "Effects of Underfill Materials on the Reliability of Low-K Flip-Chip Packaging," Microelectr. Reliab., Vol. 46, No. 1 (2006), pp. 155-163.
    • (2006) Microelectr. Reliab , vol.46 , Issue.1 , pp. 155-163
    • Chen, K.M.1
  • 6
    • 84961684949 scopus 로고    scopus 로고
    • Packaging Assessment of Porous Ultra Low-K Materials
    • San Francisco, CA
    • Rasco, M. et al, "Packaging Assessment of Porous Ultra Low-K Materials," Proc. IEEE 2002 Int. Interconnect Technol. Conf., San Francisco, CA, 2002, pp. 113-115.
    • (2002) Proc. IEEE 2002 Int. Interconnect Technol. Conf , pp. 113-115
    • Rasco, M.1
  • 8
    • 0034821489 scopus 로고    scopus 로고
    • Constitutive Behaviour of Lead-free Solders vs. Lead-containing Solders Experiments on Bulk Specimens and Flip-Chip Joints
    • Orlando, FL
    • st Electr. Comp. Technol. Conf., Orlando, FL, 2001, pp. 890-902.
    • (2001) st Electr. Comp. Technol. Conf , pp. 890-902
    • Wiese, S.1
  • 9
    • 50249135089 scopus 로고    scopus 로고
    • JEDEC Solid State Technology Association
    • JEDEC Solid State Technology Association, JESD22-A104-B: Temperature Cycling, 2000.
    • (2000) JESD22-A104-B: Temperature Cycling
  • 10
    • 13944261675 scopus 로고    scopus 로고
    • Effect of Underfill Thermomechanical Properties on Thermal Cycling Fatigue Reliability of Flip-Chip Ball Grid Array
    • Wang, T. H. et al, "Effect of Underfill Thermomechanical Properties on Thermal Cycling Fatigue Reliability of Flip-Chip Ball Grid Array," J. Electr. Pack., ASME, Vol. 126, No. 4 (2004), pp. 560-564.
    • (2004) J. Electr. Pack., ASME , vol.126 , Issue.4 , pp. 560-564
    • Wang, T.H.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.