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Volumn , Issue , 2008, Pages 294-299

A formal approach to the protocol converter problem

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; BUSES; COMMUNICATION; INDUSTRIAL ENGINEERING; INTEGRATED CIRCUITS; ITERATIVE METHODS; MICROPROCESSOR CHIPS; STANDARDS; TESTING;

EID: 49749105189     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2008.4484695     Document Type: Conference Paper
Times cited : (15)

References (13)
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  • 2
    • 0026263373 scopus 로고
    • Synthesizing converters between finite state protocols
    • IEEE Computer Society
    • J. Akella and K. L. McMillan. Synthesizing converters between finite state protocols. In ICCD, pages 410-413. IEEE Computer Society, 1991.
    • (1991) ICCD , pp. 410-413
    • Akella, J.1    McMillan, K.L.2
  • 5
    • 49749105731 scopus 로고    scopus 로고
    • Protocol compatibility and automatic converter synthesis
    • Technical Report 0718, UNSW, Australia, August
    • K. Avnit, V. D'Silva, A. Sowmya, S. Ramesh, and S. Parameswaran. Protocol compatibility and automatic converter synthesis. Technical Report 0718, UNSW, Australia, August 2007.
    • (2007)
    • Avnit, K.1    D'Silva, V.2    Sowmya, A.3    Ramesh, S.4    Parameswaran, S.5
  • 6
    • 2342531002 scopus 로고    scopus 로고
    • Bridge over troubled wrappers: Automated interface synthesis
    • IEEE Computer Society
    • V. D'Silva, S. Ramesh, and A. Sowmya. Bridge over troubled wrappers: Automated interface synthesis. In VLSI Design, pages 189-194. IEEE Computer Society, 2004.
    • (2004) VLSI Design , pp. 189-194
    • D'Silva, V.1    Ramesh, S.2    Sowmya, A.3
  • 7
    • 3042606518 scopus 로고    scopus 로고
    • Synchronous protocol automata: A framework for modelling and verification of soc communication architectures
    • IEEE Computer Society
    • V. D'Silva, S. Ramesh, and A. Sowmya. Synchronous protocol automata: A framework for modelling and verification of soc communication architectures. In DATE, pages 390-395. IEEE Computer Society, 2004.
    • (2004) DATE , pp. 390-395
    • D'Silva, V.1    Ramesh, S.2    Sowmya, A.3
  • 8
    • 49749086001 scopus 로고    scopus 로고
    • General transducer architecture. Technical Report TR 05-08, CECS Center for Embedded Computer Systems University of California, Irvine
    • August
    • D. Gajski, H. Cho, and S. Abdi. General transducer architecture. Technical Report TR 05-08, CECS Center for Embedded Computer Systems University of California, Irvine, August 2005.
    • (2005)
    • Gajski, D.1    Cho, H.2    Abdi, S.3
  • 9
    • 0029233510 scopus 로고
    • Interfacing incompatible protocols using interface process generation
    • S. Narayan and D. Gajski. Interfacing incompatible protocols using interface process generation. In DAC, pages 468-473, 1995.
    • (1995) DAC , pp. 468-473
    • Narayan, S.1    Gajski, D.2
  • 10
    • 0036911690 scopus 로고    scopus 로고
    • Convertibility verification and converter synthesis: Two faces of the same coin
    • ACM
    • R. Passerone, L. de Alfaro, T. A. Henzinger, and A. L. Sangiovanni-Vincentelli. Convertibility verification and converter synthesis: two faces of the same coin. In ICCAD, pages 132-139. ACM, 2002.
    • (2002) ICCAD , pp. 132-139
    • Passerone, R.1    de Alfaro, L.2    Henzinger, T.A.3    Sangiovanni-Vincentelli, A.L.4
  • 11
    • 0031622883 scopus 로고    scopus 로고
    • R. Passerone, J. A. Rowson, and A. L. Sangiovanni-Vincentelli. Automatic synthesis of interfaces between incompatible protocols. In DAC, 1998.
    • R. Passerone, J. A. Rowson, and A. L. Sangiovanni-Vincentelli. Automatic synthesis of interfaces between incompatible protocols. In DAC, 1998.
  • 12
    • 0031619199 scopus 로고    scopus 로고
    • Automated composition of hardware components
    • J. Smith and G. D. Micheli. Automated composition of hardware components. In DAC, pages 14-19, 1998.
    • (1998) DAC , pp. 14-19
    • Smith, J.1    Micheli, G.D.2
  • 13
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    • Protocol transducer synthesis using divide and conquer approach
    • IEEE
    • S. Watanabe, K. Seto, Y. Ishikawa, S. Komatsu, and M. Fujita. Protocol transducer synthesis using divide and conquer approach. In ASP-DAC. IEEE, 2007.
    • (2007) ASP-DAC
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.