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Akella, J.1
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3
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0031622883
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'Automatic synthesis of interfaces between incompatible protocols'
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(University of California, Berkeley)
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Passerone, R.: 'Automatic synthesis of interfaces between incompatible protocols' (University of California, Berkeley, 1998)
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Passerone, R.1
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4
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0028455002
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'Clairvoyant: A synthesis system for production based specification'
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IEEE Trans. Very Large Scale Integr. (VLSI) Syst.
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Seawright, A.1
Brewer, F.2
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5
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0033893078
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'Grammar-based hardware synthesis from port size independent specifications'
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Oberg, J., Kumar, A., and Hemani, A.: 'Grammar-based hardware synthesis from port size independent specifications', IEEE Trans. Very Large Scale Integr. (VLSI) Syst., 2000, 8, (2), pp. 184-194
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IEEE Trans. Very Large Scale Integr. (VLSI) Syst.
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Oberg, J.1
Kumar, A.2
Hemani, A.3
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6
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0036047094
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'A novel synthesis technique for communication controller hardware from declarative data communication protocol specifications'
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Siegmund, R., and Müller, D.: 'A novel synthesis technique for communication controller hardware from declarative data communication protocol specifications'. Presented at the 39th Conf. on Design Automation, 2002
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39th Conf. on Design Automation
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Siegmund, R.1
Müller, D.2
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7
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0003620778
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'Introduction to automata theory, languages and computation'
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(Addison Wesley)
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Hopcroft, J.E., Motwani, R., and Ullman, J.D.: 'Introduction to automata theory, languages and computation' (Addison Wesley, 2001)
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(2001)
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Hopcroft, J.E.1
Motwani, R.2
Ullman, J.D.3
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8
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0029766594
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'A system for compiling and debugging structured data processing controllers'
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Geneva, Switzerland, September
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Seawright, A., Holtmann, U., Meyer, W., Pangrle, B., Verbrugghe, R., and Buck, J.: 'A system for compiling and debugging structured data processing controllers'. Proc. EuroDAC'96, Geneva, Switzerland, September 1996
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Seawright, A.1
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Verbrugghe, R.5
Buck, J.6
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10
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0034245531
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'System level virtual prototyping of DSP SOCs using grammar based approach'
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Hemani, A., Kumar Deb, A., Oberg, J., Postula, A., Lindqvist, D., and Fjellborg, B.: 'System level virtual prototyping of DSP SOCs using grammar based approach', Des. Autom. Embedded Syst., 2000, 5 (3), pp. 295-311
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Fjellborg, B.6
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11
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0035310518
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'Grammar-based design of embedded systems'
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Oberg, J., O'Nils, M., Jantsch, A., Postula, A., and Hemani, A.: 'Grammar-based design of embedded systems', J. Syst. Archit., 2001, VI 47, pp. 225-240
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Oberg, J.1
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Jantsch, A.3
Postula, A.4
Hemani, A.5
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12
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0034794873
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'Control and communication performance analysis of embedded DSP systems in the MASIC methodology'
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Montreal, Canada, October
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Kumar Deb, A., Oberg, J., and Jantsch, A.: 'Control and communication performance analysis of embedded DSP systems in the MASIC methodology'. Proc. 14th Int. Symp. on System Synthesis (ISSS 2001), Montreal, Canada, October 2001, pp. 274-279
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Kumar Deb, A.1
Oberg, J.2
Jantsch, A.3
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13
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0023564267
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'Synthesis and optimization of interface transducer logic'
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Int. Conf. on Computer-Aided Design
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Borriello, G.1
Katz, R.H.2
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14
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0036911690
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'Convertibility verification and converter synthesis: Two faces of the same coin'
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Presented at the
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Passerone, R., De Alfaro, L., Henzinger, T.A., and Sangiovanni-Vincentelli, A.L.: 'Convertibility verification and converter synthesis: two faces of the same coin'. Presented at the IEEE/ ACM Int. Conf. on Computer-Aided Design, 2002
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IEEE/ACM Int. Conf. on Computer-Aided Design
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Passerone, R.1
De Alfaro, L.2
Henzinger, T.A.3
Sangiovanni-Vincentelli, A.L.4
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17
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0027662042
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'Interface optimization for concurrent systems under timing constraints'
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Filo, D., Ku, D.C., Coelho, C.N., and De Micheli, G.: 'Interface optimization for concurrent systems under timing constraints', IEEE Trans. Very Large Scale Integr. (VLSI) Syst., 1993, 1, (3), pp. 268-281
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Filo, D.1
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19
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0036290718
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'A design methodology for IP integration'
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Presented at the, Scottsdale, AZ, USA, May
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Coussy, P., Baganne, A., and Martin, E.: 'A design methodology for IP integration'. Presented at the IEEE Int. Symp. on Circuits & Systems (ISCAS), Scottsdale, AZ, USA, May 2002
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IEEE Int. Symp. on Circuits & Systems (ISCAS)
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Coussy, P.1
Baganne, A.2
Martin, E.3
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20
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0032642997
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'Efficient algorithms for optimum cycle mean and optimum cost to time ratio problems'
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Presented at the
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Dasdan, A., Irani, S.S., and Gupta, R.K.: 'Efficient algorithms for optimum cycle mean and optimum cost to time ratio problems'. Presented at the 36th ACM/IEEE Conf. on Design Automation, 1999
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(1999)
36th ACM/IEEE Conf. on Design Automation
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Dasdan, A.1
Irani, S.S.2
Gupta, R.K.3
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21
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0001391363
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'A characterisation of the minimum cycle mean in a digraph'
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Karp, R.M.: 'A characterisation of the minimum cycle mean in a digraph', Discrete Math., 1978, 23, pp. 309-311
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Karp, R.M.1
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22
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0004116989
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'Introduction to Algorithms'
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(MIT Press, Cambridge, MA)
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Connen, T., Leiserson, C., and Rivest, R.: 'Introduction to Algorithms' (MIT Press, Cambridge, MA, 2001)
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(2001)
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Connen, T.1
Leiserson, C.2
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23
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0038757976
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'Synthesis and optimisation of interfaces between hardware modules with incompatible protocols'
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Presented at the, Bangkok, Thailand, May
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Androutsopoulos, V., Clarke, T.J.W., and Brookes, M.: 'Synthesis and optimisation of interfaces between hardware modules with incompatible protocols'. Presented at the IEEE Int. Symp. on Circuits & Systems (ISCAS), Bangkok, Thailand, May 2003
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IEEE Int. Symp. on Circuits & Systems (ISCAS)
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Androutsopoulos, V.1
Clarke, T.J.W.2
Brookes, M.3
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