An adaptively dividable dual-port BiTCAM for virus-detection processors in mobile devices

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 51, Issue , 2008, Pages 390-622

  Wang, Chao Ching ^a   Cheng, Chieh Jen ^a   Chen, Tien Fu ^a   Wang, Jinn Shyan ^a  

^a NATIONAL CHUNG CHENG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

NETWORKS (CIRCUITS); SOLID STATE DEVICES;

DUAL PORT; POWER REDUCTIONS; VIRUS DETECTION;

VIRUSES;

EID: 49549108239     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2008.4523221     Document Type: Conference Paper

References (5)

1. M. Yadav, A. Venkatachaliah and P. Franzon, "Hardware Architecture of a Parallel Pattern Matching Engine," Proc. ISCAS, pp. 1369-1372, May 2007.
2. L. Tan and T. Sherwood, "A High Throughput String Matching Architecture for Intrusion Detection and Prevention," Proc. ISCAS, pp. 112-122, Jun. 2005.
3. Y. H. Cho, et al., "A Pattern Matching Co-Processor for Network Security," Proc. DAC, pp. 234-239, Jun. 2005.
4. S. Wu, et al., "A Fast Algorithm for Multi-Pattern Searching," Technical Report TR-94-17, Department of Computer Science University of Arizona, 1994.
5. J.-S. Wang, H.-Y. Li, C.-C. Chen and C. Yeh, "An AND-Type Match-Line Scheme for Energy-Efficient Content Addressable Memories," ISSCC Dig. Tech. Papers, pp. 464-467, Feb. 2005.