Efficient synthesis of compressor trees on FPGAs

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn , Issue , 2008, Pages 138-143

  Parandeh Afshar, Hadi ^a   Brisk, Philip ^b   Ienne, Paolo ^b  

^a UNIVERSITY OF TEHRAN   (Iran)

^b EPFL   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

ADDERS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPRESSORS; COMPUTER AIDED DESIGN; COMPUTER GRAPHICS; DIGITAL ARITHMETIC; DIGITAL INTEGRATED CIRCUITS; ELECTRIC POWER SUPPLIES TO APPARATUS; INDUSTRIAL ENGINEERING; INTEGRATED CIRCUITS;

ARITHMETIC CIRCUITS; ASIC DESIGNS; COMPRESSOR TREE; DESIGN AUTOMATION CONFERENCE; DIGITAL SIGNALS; EFFICIENT SYNTHESIS; FAST CARRY; INTEGER VALUES; PARALLEL COUNTERS; SOUTH PACIFIC; SYNTHESIS TOOLS; VIDEO PROCESSING;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 49549083886     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASPDAC.2008.4483927     Document Type: Conference Paper

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