Characteristics of poly-si nanowire transistors with multiple-gate configurations

International Symposium on VLSI Technology, Systems, and Applications, Proceedings

Volumn , Issue , 2008, Pages 101-102

  Hsu, Hsing Hui ^a   Lin, Horng Chih ^a,b   Lee, Ko Hui ^a   Huang, Jian Fu ^a   Huang, Tiao Yuan ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

^b NATIONAL NANO DEVICE LABORATORIES   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 49049088107     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VTSA.2008.4530818     Document Type: Conference Paper

References (6)

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4. H. C. Lin et al., IEEE Electron Device Lett., vol. 26, pp. 643-645, Sep. 2005.
5. H. C. Lin and C. J. Su, IEEE Trans. Nanatechnology, vol. 6, pp. 206-212, Mar. 2007.
6. M. Masahara et al., IEEE Trans. Electron Devices., vol.52, pp. 2046-2053, Sep. 2005.