Prototyping efficient interprocessor communication mechanisms

Proceedings - 2007 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, IC-SAMOS 2007

Volumn , Issue , 2007, Pages 26-33

  Papaefstathiou, Vassilis ^a   Pnevmatikatos, Dionisios ^a   Marazakis, Manolis ^a   Kalokairinos, Giorgos ^a   Ioannou, Aggelos ^a   Papamichael, Michael ^a   Kavadias, Stamatis ^a   Mihelogiannakis, Giorgos ^a   Katevenis, Manolis ^a  

^a INSTITUTE OF COMPUTER SCIENCE   (Greece)

Author keywords

[No Author keywords available]

Indexed keywords

BENCHMARKING; CHLORINE COMPOUNDS; COMPUTER ARCHITECTURE; COMPUTER SYSTEMS; EMBEDDED SYSTEMS; MECHANISMS; PARALLEL PROCESSING SYSTEMS; SOFTWARE PROTOTYPING;

BENCHMARK APPLICATIONS; COMMUNICATION CAPABILITIES; DATA DELIVERY; DESIGN COSTS; EMBEDDED COMPUTER SYSTEMS; HIGH SPEEDS; INTER-PROCESSOR COMMUNICATION; INTERNATIONAL CONFERENCES; LINK BUNDLING; MODELING AND SIMULATION; NETWORK INTERFACES; NOTIFICATION MECHANISMS; PARALLEL COMPUTING SYSTEMS; PLATFORM ARCHITECTURE; PROTOTYPING; RAPID SYSTEM PROTOTYPING; REMOTE DMA; ZERO-COPY;

ARCHITECTURAL DESIGN;

EID: 47749114221     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICSAMOS.2007.4285730     Document Type: Conference Paper

References (18)

1. M. Marazakis, K. Xinidis, V. Papaefstathiou, and A. Bilas. Efficient Remote Block-level I/O over an RDMA-capable NIC. In Proceedings, International Conference on Supercomputing (ICS 2006), Queensland, Australia, June 28-30 2006.
2. Eric A. Brewer, Frederic T. Chong, Lok T. Liu, Shamik D. Sharma, and John D. Kubiatowicz. Remote Queues: Exposing Message Queues for Optimization and Atomicity. In SPAA 1995.
3. M. Katevenis, E. Markatos, P. Vatsolaki, and C. Xanthaki. The Remote Enqueue Operation on Networks of Workstations. Proceedings of CANPC'98, Jan. 1998.
4. Xilinx Inc. Rocket I/O User Guide. http://www.xilinx.com/bvdocs/ userguides/ug024.pdf.
5. H. T. Kung, T. Blackwell, and A. Chapman. Credit-Based Flow Control for ATM Networks: Credit Update Protocol, Adaptive Credit Allocation and Statistical Multiplexing. In Proceedings of the ACM SIGCOMM Conference, 1994.
6. M. Katevenis and G. Passas. Variable-Size Multipacket Segments in Buffered Crossbar (CICQ) Architectures. In Proceedings, IEEE International Conference on Communications (ICC 2005), Seoul, Korea, May 16-20 2005.
7. J. Duncanson. Inverse Multiplexing. IEEE Communications Magazine, 32(4):34-41, April 1994.
8. M. Shreedhar and George Varghese. Efficient fair queueing using deficit round robin. In SIGCOMM '95: Proceedings of the conference on Applications, technologies, architectures, and protocols for computer communication, pages 231-242, New York, NY, USA, 1995. ACM Press.
9. M. Katevenis, G. Passas, D. Simos, I. Papaefstathiou, and N. Chrysos. Variable Packet Size Buffered Crossbar (CICQ) Switches. In Proceedings, IEEE International Conference on Communications (ICC 2004), Paris, France, June 20-24 2004.
10. Xilinx Inc. Xilinx ML325 Characterization Board. http://www.xilinx.com.
11. G. Passas. Performance Evaluation of Variable Packet Size Buffered Crossbar Switches. Technical Report FORTH-ICS/TR-328, Institute of Computer Science, FORTH, Heraklion, Greece, November 2003.
12. Infiniband Trade Association. An Infiniband Technology Overview. http://www.infinibandta.org/ibta.
13. N. Boden, D. Cohen, R. Felderman, A. Kulawik, C. Seitz, J. Seizovicm, and W. Su. Myrinet: A Gigabit-per-second Local-area Network. IEEE-Micro, 15(1):29-36, July-August 1995.
14. J. Beecroft, D. Addison, D. Hewson, M. McLaren, D. Roweth, F. Petrini, and J. Nieplocha. QsNet2: Defining High-Performance Network Design. IEEE-Micro, 25(4):34-47, July-August 2005.
15. D. Mayhew and V. Krishnan. PCI Express and Advanced Switching: Evolutionary Path to Building Next-Generation Interconnects. In Proceedings, 11th IEEE International Symposium on High Performance Interconnects, 2003.
16. C. Sapuntzakis, A. Romanow, and J. Chase. The case for RDMA. http://suif.stanford.edu/ csapuntz/draft-csapuntz-caserdma-00.txt.
17. D. Dunning, G. Regnier, G. McAlpine, D. Cameron, B.Shubert, F. Berry, A. Merritt, E. Gronke, and C. Dodd. The Virtual Interface Architecture. IEEE-Micro, 18(2):66-76, 1998.
18. Kenji Yoshigoe, Ken Christensen, and Aju Jacob. The RR/RR CICQ Switch: Hardware Design for 10-Gbps Link Speed. In Proceedings, IEEE International Performance, Computing, and Communications Conference, pages 481-485, April 2003.