A novel approach to design BCD adder and carry skip BCD adder

Proceedings of the IEEE International Frequency Control Symposium and Exposition

Volumn , Issue , 2008, Pages 566-571

  Biswas, Ashis Kumer ^a   Hasan, Md Mahmudul ^a   Hasan, Moshaddek ^a   Chowdhury, Ahsan Raja ^a   Babu, Hafiz Md Hasan ^a  

^a UNIVERSITY OF DHAKA   (Bangladesh)

Author keywords

[No Author keywords available]

Indexed keywords

FUZZY LOGIC; KETONES; LOGIC GATES; OPTICAL DATA PROCESSING;

BCD ADDER; BINARY CODED DECIMAL (BCD) ADDER; GARBAGE OUTPUT; INTERNATIONAL CONFERENCES; LOW POWER CMOS; MODIFIED DESIGNS; NANO-COMPUTING; NUMBER OF GATES; OPTICAL COMPUTING; RESEARCH AREA (RA); REVERSIBLE LOGICS; VLSI DESIGNS;

CARRY LOGIC;

EID: 47649092911     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSI.2008.37     Document Type: Conference Paper

References (13)

1. Keyes R, Landauer R. Minimal Energy Dissipation in Logic. IBM Journal of Research and Development 1970; 14: 153-7.
2. Landauer R. Irreversibility and heat generation in the computational process's. IBM Journal of Research Development 1961; 5: 183-91.
3. Bennett CH. Logical reversibility of computation. IBM Journal of Research and Development 1973; 17: 525-32.
4. Shende VV, Prasad AK, Markov IL, Hayes JP. Synthesis of reversible logic circuits. IEEE Transaction on CAD 2003; 22(6): 723-9.
5. Moore GE. Cramming more components onto integrated circuits. Journal of Electronics 1965; 38(8).
6. Frank M. Physical Limits of Computing. CIS 4930.1194Xy6930.1078X, 2000.
7. Perkowski M. Reversible Computation for Beginners. Lecture Series 2000. Portland State University. http:yywww.ee. pdx.eduy-mperkows.
8. Hayes JP. Computer Architecture and Organization, 3rd ed. McGraw-Hill; 1998.
9. Babu HMH, Chowdhury AR. Design of a Compact Reversible Binary Coded Decimal Adder Circuit. Elsevier Journal of Systems Architecture 2006, 52 (5): 272-82.
10. th International Conference on VLSI Design 2004; 757-60.
11. th International Conference on VLSI Design 2006; 387-92.
12. th International Symposium on Representations and Methodology of Future Computing Technologies, March 2003, 144-153.
13. Peres A. Reversible Logic and Quantum Computers. Physical Review 1985; 3266-76.