Design of a compact reversible binary coded decimal adder circuit

Journal of Systems Architecture

Volumn 52, Issue 5, 2006, Pages 272-282

  Hasan Babu, Hafiz Md ^a   Chowdhury, Ahsan Raja ^a  

^a UNIVERSITY OF DHAKA   (Bangladesh)

Author keywords

Binary coded decimal; Full adder; Garbage output; Parallel adder; Reversible logic

Indexed keywords

CMOS INTEGRATED CIRCUITS; FORMAL LOGIC; OPTICAL ENGINEERING; PRODUCT DESIGN; QUANTUM THEORY;

BINARY CODED DECIMAL (BCD); FULL ADDER; GARBAGE OUTPUT; PARALLEL ADDER; REVERSIBLE LOGIC;

CIRCUIT THEORY;

EID: 33645856769     PISSN: 13837621     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sysarc.2005.05.005     Document Type: Article

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