Predictive efficiency optimization for DC-DC converters with highly dynamic digital loads

IEEE Transactions on Power Electronics

Volumn 23, Issue 4, 2008, Pages 1859-1869

  Trescases, Olivier ^a,b   Wei, Guowen ^a,c   Prodic, Aleksandar ^a   Ng, Wai Tung ^a  

^a UNIVERSITY OF TORONTO   (Canada)

^b INFINEON TECHNOLOGIES AUSTRIA AG   (Austria)

^c UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Class D amplifier; Digital control; Efficiency optimization; Low power dc dc converter; Segmented power stage

Indexed keywords

AUDIO EQUIPMENT; AUDIO FREQUENCY AMPLIFIERS; CMOS INTEGRATED CIRCUITS; CONTROL SYSTEM STABILITY; DC-DC CONVERTERS; DIGITAL ARITHMETIC; DIGITAL DEVICES; ENERGY POLICY; FORECASTING; HVDC POWER TRANSMISSION; LAWS AND LEGISLATION; OPTIMIZATION; POWER CONVERTERS; STAGES; VOLTAGE REGULATORS;

AUDIO AMPLIFIERS; BUCK CONVERTERS; CLASS-D; CONDUCTION LOSSES; CONVERTER EFFICIENCY; DC CONVERTERS; DIGITAL DATA; DIGITAL LOADS; DIGITALLY CONTROLLED; DYNAMIC ADJUSTMENT; EFFICIENCY OPTIMIZATION; ELECTRONIC LOADS; EXPERIMENTAL SYSTEMS; HIGH FIDELITY; LOAD CURRENTS; MEASUREMENT CIRCUIT; ON THE FLY (OTF); OUTPUT CURRENTS; OUTPUT VOLTAGE REGULATION; PORTABLE APPLICATIONS; POWER CONSUMPTION (CE); REAL-TIME PREDICTION; TOTAL ENERGY CONSUMPTION; TRANSISTOR SIZE;

COMPUTER GRAPHICS;

EID: 47249154424     PISSN: 08858993     EISSN: None     Source Type: Journal    
DOI: 10.1109/TPEL.2008.924823     Document Type: Article

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