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Volumn 2, Issue , 2005, Pages 911-917

Sensorless optimization of dead times in DC-DC converters with synchronous rectifiers

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; DIGITAL CONTROL SYSTEMS; ELECTRIC NETWORK ANALYSIS; ELECTRIC RECTIFIERS; OPTIMIZATION;

EID: 33744998751     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/APEC.2005.1453093     Document Type: Article
Times cited : (22)

References (10)
  • 1
    • 2342487091 scopus 로고    scopus 로고
    • Predictive gate drive boosts synchronous dc/dc power converter efficiency
    • SLUA281 - April
    • S. Mapus, "Predictive gate drive boosts synchronous dc/dc power converter efficiency," Texas Instruments Application Report, SLUA281 - April 2003.
    • (2003) Texas Instruments Application Report
    • Mapus, S.1
  • 2
    • 0026880607 scopus 로고
    • Autonomous control technique for high-performance switches
    • June
    • P.T. Krein, R.M. Bass, "Autonomous control technique for high-performance switches," IEEE Transactions on Industrial Electronics, Vol. 39, No. 3, June 1992, pp:215-222.
    • (1992) IEEE Transactions on Industrial Electronics , vol.39 , Issue.3 , pp. 215-222
    • Krein, P.T.1    Bass, R.M.2
  • 3
    • 84937408196 scopus 로고    scopus 로고
    • Synchronous rectification with adaptive timing control
    • B. Acker, C. R. Sullivan, S. R. Sanders, "Synchronous rectification with adaptive timing control," IEEE PESC 1995, pp. 88-95.
    • IEEE PESC 1995 , pp. 88-95
    • Acker, B.1    Sullivan, C.R.2    Sanders, S.R.3
  • 4
    • 0030654830 scopus 로고    scopus 로고
    • An integrated controller for a high frequency buck converter
    • W. Lau, S. R. Sanders, "An integrated controller for a high frequency buck converter," IEEE PESC 1997, pp. 246-254.
    • IEEE PESC 1997 , pp. 246-254
    • Lau, W.1    Sanders, S.R.2
  • 6
    • 0030375848 scopus 로고    scopus 로고
    • Continuous-time optimization of gate timing for synchronous rectification
    • J. Kimbal, P. T. Krein, "Continuous-time optimization of gate timing for synchronous rectification," IEEE Midwest Symp, 1997, pp. 1015-1018.
    • (1997) IEEE Midwest Symp , pp. 1015-1018
    • Kimbal, J.1    Krein, P.T.2
  • 7
    • 8744296058 scopus 로고    scopus 로고
    • Digital loss-minimizing multi-mode synchronous buck converter control
    • A.V. Peterchev, S.R. Sanders, "Digital loss-minimizing multi-mode synchronous buck converter control," IEEE PESC 2004, pp: 3694-3699.
    • IEEE PESC 2004 , pp. 3694-3699
    • Peterchev, A.V.1    Sanders, S.R.2
  • 10
    • 33744972879 scopus 로고    scopus 로고
    • Digital current mode controller for DC-DC converters
    • H. Peng, D. Maksimovic, "Digital current mode controller for DC-DC converters," IEEE APEC 2005.
    • IEEE APEC 2005
    • Peng, H.1    Maksimovic, D.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.