Efficient algorithm for positive-polarity reed-muller expansions of reversible circuits

Proceedings of the International Conference on Microelectronics, ICM

Volumn , Issue , 2006, Pages 63-66

  Jing, Hu ^a   GuangSheng, Ma ^a   Gang, Feng ^a  

^a HARBIN ENGINEERING UNIVERSITY   (China)

Author keywords

Boolean polynomial; Reed muller expansion; Reversible circuits; Synthesis

Indexed keywords

BOOLEAN FUNCTIONS; ELECTRONICS INDUSTRY; FUNCTION EVALUATION; HEURISTIC ALGORITHMS; HEURISTIC PROGRAMMING; MICROELECTRONICS; NETWORKS (CIRCUITS); PARTITIONS (BUILDING); TREES (MATHEMATICS);

DELAY CONSTRAINTS; EFFICIENT ALGORITHMS; HIGH PERFORMANCE; IN ORDER; INTERNATIONAL CONFERENCES; MATHEMATICAL MODELLING; PATH DELAY (PD); PRIORITY QUEUEING; REED-MULLER EXPANSIONS; REVERSIBLE CIRCUITS; SEARCH TREES; SYNTHESIS (OF CHIRAL IONIC LIQUIDS); SYNTHESIS METHODS;

HEURISTIC METHODS;

EID: 46749142121     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICM.2006.373267     Document Type: Conference Paper

References (10)

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