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Volumn , Issue , 2006, Pages 132-141

A QCA implementation of a configurable logic block for an FPGA

Author keywords

[No Author keywords available]

Indexed keywords

(OTDR) TECHNOLOGY; CONFIGURABLE LOGIC BLOCK (CLB); INTERNATIONAL CONFERENCES; LOOK UP TABLE (LUT); MEMORY DESIGNS; OUTPUT CIRCUITS; PROGRAMMABLE GATE ARRAY; PROGRAMMABLE LOGICS; QUANTUM DOT CELLULAR AUTOMATA (QCA); RE CONFIGURABLE COMPUTING (RCC); SINGLE LAYERS;

EID: 46449138180     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RECONF.2006.307763     Document Type: Conference Paper
Times cited : (45)

References (19)
  • 6
    • 46449128864 scopus 로고    scopus 로고
    • Graduate Paper. Electrical Engineering Department, Rochester Institute of Technology. May
    • T. Lantz. A QCA implementation of a look-up table for an FPGA. Graduate Paper. Electrical Engineering Department, Rochester Institute of Technology. May 2006.
    • (2006) A QCA implementation of a look-up table for an FPGA
    • Lantz, T.1
  • 7
    • 0037471662 scopus 로고    scopus 로고
    • Molecular quantum-dot cellular automata
    • C. Lent, B.Isaksen, and M. Lieberman. Molecular quantum-dot cellular automata. J. Am. Chem. Soc, 125(4): 1056-1063, 2003.
    • (2003) J. Am. Chem. Soc , vol.125 , Issue.4 , pp. 1056-1063
    • Lent, C.1    Isaksen, B.2    Lieberman, M.3
  • 8
    • 0042411919 scopus 로고    scopus 로고
    • Clocked molecular quantum-dot cellular automata
    • C. S. Lent and B. Isaksen. Clocked molecular quantum-dot cellular automata. Electron Devices, IEEE Transactions on, 50(9): 1890-1896, 2003.
    • (2003) Electron Devices, IEEE Transactions on , vol.50 , Issue.9 , pp. 1890-1896
    • Lent, C.S.1    Isaksen, B.2
  • 12
    • 33745295468 scopus 로고    scopus 로고
    • QCA memory with parallel read/serial write: Design and analysis. Circuits, Devices and Systems
    • M. Ottavi, S. Pontarelli. V. Vankamamidi, A. Salsano, and F. Lombardi. QCA memory with parallel read/serial write: design and analysis. Circuits, Devices and Systems, IEE Proceedings, 153(3): 199-206. 2006.
    • (2006) IEE Proceedings , vol.153 , Issue.3 , pp. 199-206
    • Ottavi, M.1    Pontarelli, S.2    Vankamamidi, V.3    Salsano, A.4    Lombardi, F.5
  • 19
    • 25144441770 scopus 로고    scopus 로고
    • Prentice Hall PTR Upper Saddle River, NJ, USA
    • W. Wolf. FPGA-Based System Design. Prentice Hall PTR Upper Saddle River, NJ, USA, 2004.
    • (2004) FPGA-Based System Design
    • Wolf, W.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.