메뉴 건너뛰기




Volumn , Issue , 2007, Pages 715-718

Resource-aware high performance scheduling for embedded MPSoCs with the application of MPEG decoding

Author keywords

[No Author keywords available]

Indexed keywords

DECODING; MULTIPROCESSING SYSTEMS; SCHEDULING ALGORITHMS; SYSTEM-ON-CHIP;

EID: 46449107766     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/icme.2007.4284750     Document Type: Conference Paper
Times cited : (6)

References (11)
  • 1
    • 0033886799 scopus 로고    scopus 로고
    • A single Chip, 1.6-Billion, 16-MAC/s Multiprocessor DSP
    • March
    • B. Ackland; et.al, "A single Chip, 1.6-Billion, 16-MAC/s Multiprocessor DSP", IEEE J. Solid-State Circuits, March 2000, pp. 412-424.
    • (2000) IEEE J. Solid-State Circuits , pp. 412-424
    • Ackland, B.1
  • 7
    • 0346148453 scopus 로고    scopus 로고
    • Communication-aware task scheduling and voltage selection for total systems energy minimization
    • November
    • G. Varatkar and R. Marculescu, "Communication-aware task scheduling and voltage selection for total systems energy minimization," International Conference on Computer Aided Design, November 2003.
    • (2003) International Conference on Computer Aided Design
    • Varatkar, G.1    Marculescu, R.2
  • 8
    • 46449113660 scopus 로고    scopus 로고
    • http://bmrc.berkeley.edu/frame/research/mpeg/


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.