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Volumn 10, Issue 5, 2004, Pages 364-371
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Self-aligned 0-level sealing of MEMS devices by a two layer thin film reflow process
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Author keywords
[No Author keywords available]
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Indexed keywords
ALUMINUM;
BONDING;
CHEMICAL VAPOR DEPOSITION;
CMOS INTEGRATED CIRCUITS;
COSTS;
FUSED SILICA;
MICROMACHINING;
MICROPROCESSOR CHIPS;
PACKAGING;
THIN FILMS;
VACUUM;
LOW PRESSURE CHEMICAL VAPOR DEPOSITION (LPCVD);
MICROMACHINED MEMBRANES;
WAFER BONDING;
MICROELECTROMECHANICAL DEVICES;
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EID: 4644241119
PISSN: 09467076
EISSN: None
Source Type: Journal
DOI: 10.1007/s00542-004-0415-2 Document Type: Conference Paper |
Times cited : (7)
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References (6)
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