Virtex II FPGA bitstream manipulation: Application to reconfiguration control systems

Proceedings - 2006 International Conference on Field Programmable Logic and Applications, FPL

Volumn , Issue , 2006, Pages 717-720

  Krasteva, Y E ^a   De La Torre, E ^a   Riesgo, T ^a   Joly, Didier ^b  

^a UNIVERSIDAD POLITÉCNICA DE MADRID   (Spain)

^b Memondo Graphics Inc   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

BIT ALLOCATIONS; BIT STREAM (BS); COMPUTING RESOURCES; EMBEDDED DEVICES; FIELD PROGRAMMABLE LOGIC (FPL); INTERNATIONAL CONFERENCES; RECONFIGURABLE CONTROL; RECONFIGURABLE CONTROL SYSTEMS; RECONFIGURATION CONTROL; USE CASES; VIRTEX II;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA); FUZZY LOGIC; IDENTIFICATION (CONTROL SYSTEMS); PNEUMATIC CONTROL EQUIPMENT; SYSTEMS ANALYSIS; TOOLS;

CONTROL SYSTEMS;

EID: 46249103562     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPL.2006.311298     Document Type: Conference Paper

References (16)

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