Simplified manufacturable band edge metal gate solution for NMOS without a capping layer

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2006, Pages

  Harris, H R ^b   Alshareef, H ^b   Wen, H C ^a   Krishnan, S ^a   Choi, K ^a   Luan, H ^b   Heh, D ^a   Park, C S ^a   Park, H B ^b,c   Hussain, M ^a   Ju, B S ^a   Kirsch, P D ^a   Song, S C ^a   Majhi, P ^d   Lee, B H ^b   Jammy, R ^b  

^a SEMATECH   (United States)

^b AMD ^*

^c INTEL CORPORATION   (United States)

^d IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRON DEVICES; RARE EARTH ELEMENTS;

BAND EDGES; CAPPING LAYER; LANTHANIDE; METAL GATES; WORK FUNCTIONS;

METALS;

EID: 46049118664     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2006.346863     Document Type: Conference Paper

References (8)

1. 3 Interfacial Layers Deposited by Molecular Beam Epitaxy, " VLSI Technology, 2006.
2. X.P. Wang, et al., , "Dual Metal Gates with Band-Edge Work Functions on Novel HfLaO High- κ Gate Dielectric, " VLSI (2006).
3. V. Narayanan, et al, "Band-Edge High-Performance High-k/Metal Gate n-MOSFETs using Cap Layers Containing Group IIA and IIIB Elements with Gate-First Processing for 45 nm and Beyond, , et al, VLSI(2006)
4. T. Gougousi, et al, APL 80, pp. 4419 (2005)
5. W.R.L. Lambrecht, PhysRevB 62, pp. 13,538 (2000)
6. Ren, C.; Chan, D.S.H.; Faizhal, B.B.; Li, M.-F.; Yeo, Y.-C.; Trigg, A.D.; Agarwal, A.; Balasubramanian, N.; Pan, J.S.; Lim, P.C.; Kwong, D.-L.,"Lanthanide-incorporated metal nitrides with tunable work function and good thermal stability for NMOS devices",VLSI Technology, 2005.
7. C. Ren, EDL 25, pp. 75 (2005)
8. C.D. Young, et al, IRPS, pp. 75, (2005).