Manufacturing implementation of 32nm SRAM using ArF immersion with RET

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 6924, Issue , 2008, Pages

  Lee, Sho Shen ^a   Wu, Cheng Han ^a   Huang, Yongfa ^a   Huang, Chien Hui ^a   Huang, Hung Chin ^a   Huang, George K C ^a   Yu, Chun Chi ^a   Hsu, Michael ^c   Shieh, Simon ^c   Hsu, Stephen ^b   Chiao, T B ^c  

^a UNITED MICROELECTRONICS CORPORATION   (Taiwan)

^b ASML US Inc   (United States)

^c ASML Taiwan Ltd   (Taiwan)

Author keywords

CD uniformity; Double patterning technique(DPT); Optical proximity correction (OPC); Resolution enhancement technique (RET)

Indexed keywords

(E ,3E) PROCESS; CONTROL METHODOLOGY; DESIGN RULES; EMPIRICAL DATA; EXPOSURE PARAMETERS; EXPOSURE TOOLS; HYPER-NA; IMMERSION EXPOSURE; IMMERSION PROCESSING; MASK DATA; MASK DATA PREPARATION (MDP); MASK DESIGNS; MASK MAKING; METAL LAYERS; OPTICAL MICRO LITHOGRAPHY; PATTERN SIZES; POLY (PSS) ,; PROCESS DEVELOPMENTS; PROCESS PERFORMANCE; PROCESS WINDOWS; PRODUCTION ENVIRONMENTS; RESOLUTION-ENHANCEMENT TECHNOLOGY (RET); SEMICONDUCTOR MANUFACTURING; SRAM CELLS; TARGET DESIGNS; ULTRA HIGH NA; WAFER PRINTING;

ARCHITECTURAL DESIGN; COMPUTER NETWORKS; IMAGE QUALITY; LAWS AND LEGISLATION; MULTITASKING; NANOTECHNOLOGY; OPTIMIZATION; PHOTOLITHOGRAPHY; PRINTING; SODIUM; SPECIFICATIONS; STATIC RANDOM ACCESS STORAGE; TECHNOLOGY; WINDOWS;

MASKS;

EID: 45449094393     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.773137     Document Type: Conference Paper

References (4)

1. M. H. Wu, et al, "Implementation of Double Dipole Lithography for 45nm node poly and diffusion layer manufacturing", SPIE Vol. 4691, 2007.
2. S.D. Hsu, et. al., "65nm full-chip implementation using double dipole lithography" SPIE 2003, vol.5040 3. C.W. Michael Hsu, st. al, "Lithography Manufacturing Implementation for 65nm and 45nm Nodes With Model-Based Scattering Bars Using IML Technology" SPIE 2005
3. Chungwei Hsu et .al., "Patterning Half-wavelength DRAM cell using Chromeless Phase Lithography (CPL)", SPIE Vol. 4691, pp 76-88, 2002
4. Doug van den Broeke et .al., "Near 0.3 kl full pitch contact hole patterning using chromeless phase lithography (CPL)", SPIE Vol. 5256, pp 297-308, 2003