On test generation for transition faults with minimized peak power dissipation

Proceedings - Design Automation Conference

Volumn , Issue , 2004, Pages 504-509

  Li, Wei ^a   Reddy, Sudhakar M ^a   Pomeranz, Irith ^b  

^a UNIVERSITY OF IOWA   (United States)

^b PURDUE UNIVERSITY   (United States)

Author keywords

Power dissipation; Test generation; Transition faults

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; FAULT TOLERANT COMPUTER SYSTEMS; FLIP FLOP CIRCUITS; HEAT LOSSES; POWER CONTROL; VECTORS;

PEAK POWER; POWER DISSIPATION; TEST GENERATION; TRANSITION FAULTS;

ONLINE SYSTEMS;

EID: 4444323968     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/996566.996706     Document Type: Conference Paper

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