Re-synthesis for delay variation tolerance

Proceedings - Design Automation Conference

Volumn , Issue , 2004, Pages 814-819

  Chang, Shih Chieh ^a   Hsieh, Cheng Tao ^a   Wu, Kai Chiang ^a  

^a NATIONAL TSING HUA UNIVERSITY   (Taiwan)

Author keywords

Delay variation; Tolerance

Indexed keywords

ELECTRIC POTENTIAL; ELECTRIC WIRE; FAULT TOLERANT COMPUTER SYSTEMS; FREQUENCIES; RELIABILITY; TIMING CIRCUITS;

DELAY TOLERANCE; DELAY VARIATION; RE-SYNTHESIZED CIRCUITS; TIMING ANALYSIS;

DELAY CIRCUITS;

EID: 4444237810     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/996566.996785     Document Type: Conference Paper

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