Modeling of on-chip bus switching current and its impact on noise in power supply grid

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 16, Issue 6, 2008, Pages 766-770

  Tuuna, Sampo ^a   Zheng, Li Rong ^b   Isoaho, Jouni ^a   Tenhunen, Hannu ^a  

^a UNIVERSITY OF TURKU   (Finland)

^b ROYAL INSTITUTE OF TECHNOLOGY   (Sweden)

Author keywords

Bus; Power supply noise; Transmission line

Indexed keywords

BUSBARS; CAPACITANCE; ELECTRIC LINES; ELECTRIC RESISTANCE; INDUCTANCE; SPURIOUS SIGNAL NOISE; SWITCHING CIRCUITS;

POWER SUPPLY NOISE; RESISTANCE-INDUCTANCE-CAPACITANCE (RLC) LINES; SWITCHING PATTERNS;

ELECTRIC POWER DISTRIBUTION;

EID: 44249096826     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2008.2000258     Document Type: Conference Paper

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