-
1
-
-
0030697593
-
Hardware Fault Containment in Scalable Shared-Memory Multiprocessors
-
D. Teodosiu, J. Baxter, K. Govil, J. Chapin, M. Rosenblum, and M. Horowitz, "Hardware Fault Containment in Scalable Shared-Memory Multiprocessors," Proc. 24th Ann. Int'l Symp. Computer Architecture, Computer Architecture News vol. 25, pp. 73-84, 1997.
-
(1997)
Proc. 24th Ann. Int'l Symp. Computer Architecture, Computer Architecture News
, vol.25
, pp. 73-84
-
-
Teodosiu, D.1
Baxter, J.2
Govil, K.3
Chapin, J.4
Rosenblum, M.5
Horowitz, M.6
-
2
-
-
0034444383
-
Architecture and Design of AlphaServer GS320
-
Nov
-
K. Gharachorloo, M. Sharma, S. Steely, and S. Van Doren, "Architecture and Design of AlphaServer GS320," ACM SIGPLAN Notices, vol. 35, no. 11, pp. 13-24, Nov. 2000.
-
(2000)
ACM SIGPLAN Notices
, vol.35
, Issue.11
, pp. 13-24
-
-
Gharachorloo, K.1
Sharma, M.2
Steely, S.3
Van Doren, S.4
-
3
-
-
44049099319
-
The AlphaServer SC45 Supercomputer: Facts and Figures
-
HP SC45 Team
-
"The AlphaServer SC45 Supercomputer: Facts and Figures," HP SC45 Team, 2002.
-
(2002)
-
-
-
5
-
-
2142786105
-
Autonet: A High-Speed, Self-Configuring Local Area Network Using Point-to-Point Links,
-
Digital Equipment Corp
-
M.D. Schroeder et al., "Autonet: A High-Speed, Self-Configuring Local Area Network Using Point-to-Point Links," SRC Research Report 59, Digital Equipment Corp., 1990.
-
(1990)
SRC Research Report
, vol.59
-
-
Schroeder, M.D.1
-
6
-
-
0029254155
-
Myrinet: A Gigabit-Per-Second Local-Area Network
-
N.J. Boden, D. Cohen, R.E. Felderman, A.E. Kulawik, C.L. Seitz, J.N. Seizovic, and W.-K. Su, "Myrinet: A Gigabit-Per-Second Local-Area Network," IEEE Micro, vol. 15, 1995.
-
(1995)
IEEE Micro
, vol.15
-
-
Boden, N.J.1
Cohen, D.2
Felderman, R.E.3
Kulawik, A.E.4
Seitz, C.L.5
Seizovic, J.N.6
Su, W.-K.7
-
8
-
-
0033310013
-
On the Effects of the IEEE 802.3x Flow Control in Full-Duplex Ethernet LANs
-
Oct
-
O. Feuser and A. Wenzel, "On the Effects of the IEEE 802.3x Flow Control in Full-Duplex Ethernet LANs," Proc. 24th IEEE Conf. Local Computer Networks, pp. 160-161, Oct. 1999.
-
(1999)
Proc. 24th IEEE Conf. Local Computer Networks
, pp. 160-161
-
-
Feuser, O.1
Wenzel, A.2
-
11
-
-
31344482243
-
Advanced Switching Core Architecture Specification
-
ASI-SIG
-
"Advanced Switching Core Architecture Specification," ASI-SIG, http://www.asi-sig.org/, 2004.
-
(2004)
-
-
-
12
-
-
0036505033
-
The Raw Microprocessor: A Computational Fabric for Software Circuits and General-Purpose Programs
-
Mar./Apr
-
M. Taylor, J. Kim, J. Miller, D. Wentzlaff, F. Ghodrat, B. Greenwald, H. Hoffman, P. Johnson, J.-W. Lee, W. Lee, A. Ma, A. Saraf, M. Seneski, N. Shnidman, V. Strumpen, M. Frank, S. Amarasinghe, and A. Agarwal, "The Raw Microprocessor: A Computational Fabric for Software Circuits and General-Purpose Programs," IEEE Micro, vol. 22, no. 2, pp. 25-35, Mar./Apr. 2002.
-
(2002)
IEEE Micro
, vol.22
, Issue.2
, pp. 25-35
-
-
Taylor, M.1
Kim, J.2
Miller, J.3
Wentzlaff, D.4
Ghodrat, F.5
Greenwald, B.6
Hoffman, H.7
Johnson, P.8
Lee, J.-W.9
Lee, W.10
Ma, A.11
Saraf, A.12
Seneski, M.13
Shnidman, N.14
Strumpen, V.15
Frank, M.16
Amarasinghe, S.17
Agarwal, A.18
-
13
-
-
27544475709
-
Sun's Niagara Pours on the Cores,
-
Sept
-
K. Krewell, "Sun's Niagara Pours on the Cores," Microprocessor Report, pp. 1-3, Sept. 2004.
-
(2004)
Microprocessor Report
, pp. 1-3
-
-
Krewell, K.1
-
14
-
-
25844503119
-
Introduction to the Cell Multiprocessor
-
J.A. Kahle, M.N. Day, H.P. Hofstee, C.R. Johns, T.R. Maeurer, and D. Shippy, "Introduction to the Cell Multiprocessor," IBM J. Research and Development, vol. 49, nos. 4/5, 2005.
-
(2005)
IBM J. Research and Development
, vol.49
, Issue.4-5
-
-
Kahle, J.A.1
Day, M.N.2
Hofstee, H.P.3
Johns, C.R.4
Maeurer, T.R.5
Shippy, D.6
-
15
-
-
44049097405
-
TRIPS Tutorial: Design and Implementation of the TRIPS EDGE Architecture
-
June
-
D. Berger et al., "TRIPS Tutorial: Design and Implementation of the TRIPS EDGE Architecture," Proc. 32nd Int'l Symp. Computer Architecture, pp. 1-239, June 2005.
-
(2005)
Proc. 32nd Int'l Symp. Computer Architecture
, pp. 1-239
-
-
Berger, D.1
-
16
-
-
14844348900
-
Scalar Operand Networks
-
Feb
-
M.B. Taylor, W. Lee, S.P. Amarasinghe, and A. Agarwal, "Scalar Operand Networks," IEEE Trans. Parallel and Distributed Systems, vol. 16, no. 2, pp. 1-18, Feb. 2005.
-
(2005)
IEEE Trans. Parallel and Distributed Systems
, vol.16
, Issue.2
, pp. 1-18
-
-
Taylor, M.B.1
Lee, W.2
Amarasinghe, S.P.3
Agarwal, A.4
-
17
-
-
44049096150
-
Unleashing the Cell Broadband Engine Processor: The Element Interconnect Bus
-
Nov
-
D. Krolak, "Unleashing the Cell Broadband Engine Processor: The Element Interconnect Bus," Proc. Fall Processor Forum, http://www-128.ibm.com/developers/power/library/pa-fpfeib/, Nov. 2005.
-
(2005)
Proc. Fall Processor Forum
-
-
Krolak, D.1
-
18
-
-
36349000348
-
Implementation and Evaluation of a Dynamically Routed Processor Operand Network
-
P. Gratz, K. Sankaralingam, H. Hanson, P. Shivakumar, R. McDonald, S.W. Keckler, and D. Burger, "Implementation and Evaluation of a Dynamically Routed Processor Operand Network," Proc. First Network-on-Chip Symp. 2007.
-
(2007)
Proc. First Network-on-Chip Symp
-
-
Gratz, P.1
Sankaralingam, K.2
Hanson, H.3
Shivakumar, P.4
McDonald, R.5
Keckler, S.W.6
Burger, D.7
-
19
-
-
0018518295
-
Virtual Cut-Through: A New Computer Communication Switching Technique
-
P. Kermani and L. Kleinrock, "Virtual Cut-Through: A New Computer Communication Switching Technique," Computer Networks, vol. 3, pp. 267-286, 1979.
-
(1979)
Computer Networks
, vol.3
, pp. 267-286
-
-
Kermani, P.1
Kleinrock, L.2
-
20
-
-
0023346637
-
Deadlock-Free Message Routing in Multiprocessor Interconnection Networks
-
May
-
W.J. Dally and C.L. Seitz, "Deadlock-Free Message Routing in Multiprocessor Interconnection Networks," IEEE Trans. Computers, vol. 36, no. 5, pp. 547-553, May 1987.
-
(1987)
IEEE Trans. Computers
, vol.36
, Issue.5
, pp. 547-553
-
-
Dally, W.J.1
Seitz, C.L.2
-
21
-
-
0026825968
-
Virtual-Channel Flow Control
-
Mar
-
W.J. Dally, "Virtual-Channel Flow Control," IEEE Trans. Parallel and Distributed Systems, vol. 3, no. 2, pp. 194-205, Mar. 1992.
-
(1992)
IEEE Trans. Parallel and Distributed Systems
, vol.3
, Issue.2
, pp. 194-205
-
-
Dally, W.J.1
-
22
-
-
0029390484
-
A Necessary and Sufficient Condition for Deadlock-Free Adaptive Routing in Wormhole Networks
-
Oct
-
J. Duato, "A Necessary and Sufficient Condition for Deadlock-Free Adaptive Routing in Wormhole Networks," IEEE Trans. Parallel and Distributed Systems, vol. 6, no. 10, pp. 1055-1067, Oct. 1995.
-
(1995)
IEEE Trans. Parallel and Distributed Systems
, vol.6
, Issue.10
, pp. 1055-1067
-
-
Duato, J.1
-
23
-
-
0030215168
-
A Necessary and Sufficient Condition for Deadlock-Free Routing in Cut-Through and Store-and-Forward Networks
-
Aug
-
J. Duato, "A Necessary and Sufficient Condition for Deadlock-Free Routing in Cut-Through and Store-and-Forward Networks," IEEE Trans. Parallel and Distributed Systems, vol. 7, no. 8, pp. 841-854, Aug. 1996.
-
(1996)
IEEE Trans. Parallel and Distributed Systems
, vol.7
, Issue.8
, pp. 841-854
-
-
Duato, J.1
-
25
-
-
0033741485
-
A Formal Model of Message Blocking and Deadlock Resolution in Interconnection Networks
-
Feb
-
S. Warnakulasuriya and T.M. Pinkston, "A Formal Model of Message Blocking and Deadlock Resolution in Interconnection Networks," IEEE Trans. Parallel and Distributed Systems, vol. 11, no. 2, pp. 212-229, Feb. 2000.
-
(2000)
IEEE Trans. Parallel and Distributed Systems
, vol.11
, Issue.2
, pp. 212-229
-
-
Warnakulasuriya, S.1
Pinkston, T.M.2
-
26
-
-
2142786105
-
Autonet: A High-Speed, Self-Configuring Local Area Network Using Point-to-Point Links,
-
Digital Equipment Corp
-
M.D. Schroeder, A.D. Birrell, M. Burrows, H. Murray, R.M. Needham, T.L. Rodeheffer, E.H. Satterthwaite, and C.P. Thacker, "Autonet: A High-Speed, Self-Configuring Local Area Network Using Point-to-Point Links," SRC Research Report 59, Digital Equipment Corp., 1990.
-
(1990)
SRC Research Report
, vol.59
-
-
Schroeder, M.D.1
Birrell, A.D.2
Burrows, M.3
Murray, H.4
Needham, R.M.5
Rodeheffer, T.L.6
Satterthwaite, E.H.7
Thacker, C.P.8
-
29
-
-
0035248279
-
A Protocol for Deadlock-Free Dynamic Reconfiguration in High-Speed Local Area Networks
-
Feb
-
R. Casado, A. Bermúdez, J. Duato, F.J. Quiles, and J.L. Sánchez, "A Protocol for Deadlock-Free Dynamic Reconfiguration in High-Speed Local Area Networks," IEEE Trans. Parallel and Distributed Systems vol. 12, no. 2, pp. 115-132, Feb. 2001.
-
(2001)
IEEE Trans. Parallel and Distributed Systems
, vol.12
, Issue.2
, pp. 115-132
-
-
Casado, R.1
Bermúdez, A.2
Duato, J.3
Quiles, F.J.4
Sánchez, J.L.5
-
30
-
-
0141460194
-
Dynamic Reconfiguration in High-Speed Computer Clusters
-
N. Natchev, D. Avresky, and V. Shurbanov, "Dynamic Reconfiguration in High-Speed Computer Clusters," Proc. Third IEEE Int'l Conf. Cluster Computing, pp. 380-387, 2001.
-
(2001)
Proc. Third IEEE Int'l Conf. Cluster Computing
, pp. 380-387
-
-
Natchev, N.1
Avresky, D.2
Shurbanov, V.3
-
31
-
-
0141724933
-
Deadlock-Free Dynamic Reconfiguration Schemes for Increased Network Dependability
-
Aug
-
T. Pinkston, R. Pang, and J. Duato, "Deadlock-Free Dynamic Reconfiguration Schemes for Increased Network Dependability," IEEE Trans. Parallel and Distributed Systems, vol. 14, no. 8, pp. 780-794, Aug. 2003.
-
(2003)
IEEE Trans. Parallel and Distributed Systems
, vol.14
, Issue.8
, pp. 780-794
-
-
Pinkston, T.1
Pang, R.2
Duato, J.3
-
32
-
-
20344367291
-
Part I: A Theory for Deadlock-Free Dynamic Network Reconfiguration
-
May
-
J. Duato, O. Lysne, R. Pang, and T.M. Pinkston, "Part I: A Theory for Deadlock-Free Dynamic Network Reconfiguration," IEEE Trans. Parallel and Distributed Systems, vol. 16, no. 5, pp. 412-427, May 2005.
-
(2005)
IEEE Trans. Parallel and Distributed Systems
, vol.16
, Issue.5
, pp. 412-427
-
-
Duato, J.1
Lysne, O.2
Pang, R.3
Pinkston, T.M.4
-
33
-
-
20344399644
-
Part II: A Methodology for Developing Deadlock-Free Dynamic Network Reconfiguration Processes
-
May
-
O. Lysne, T.M. Pinkston, and J. Duato, "Part II: A Methodology for Developing Deadlock-Free Dynamic Network Reconfiguration Processes," IEEE Trans. Parallel and Distributed Systems, vol. 16, no. 5, pp. 428-443, May 2005.
-
(2005)
IEEE Trans. Parallel and Distributed Systems
, vol.16
, Issue.5
, pp. 428-443
-
-
Lysne, O.1
Pinkston, T.M.2
Duato, J.3
-
34
-
-
20344396862
-
Dynamic Reconfiguration in Computer Clusters with Irregular Topologies in the Presence of Multiple Node and Link Failures
-
May
-
D. Avresky and N. Natchev, "Dynamic Reconfiguration in Computer Clusters with Irregular Topologies in the Presence of Multiple Node and Link Failures," IEEE Trans. Computers, vol. 54, no. 5, May 2005.
-
(2005)
IEEE Trans. Computers
, vol.54
, Issue.5
-
-
Avresky, D.1
Natchev, N.2
-
36
-
-
84976718540
-
Algorithms for Scalable Synchronization on Shared-Memory Multiprocessors
-
J.M. Mellor-Crummey and M.L. Scott, "Algorithms for Scalable Synchronization on Shared-Memory Multiprocessors," ACM Trans. Computer Systems, vol. 9, no. 1, pp. 21-65, 1991.
-
(1991)
ACM Trans. Computer Systems
, vol.9
, Issue.1
, pp. 21-65
-
-
Mellor-Crummey, J.M.1
Scott, M.L.2
-
37
-
-
0035695821
-
A General Theory for Deadlock-Free Adaptive Routing Using a Mixed Set of Resources
-
Dec
-
J. Duato and T.M. Pinkston, "A General Theory for Deadlock-Free Adaptive Routing Using a Mixed Set of Resources," IEEE Trans. Parallel and Distributed Systems, vol. 12, no. 12, pp. 1219-1235, Dec. 2001.
-
(2001)
IEEE Trans. Parallel and Distributed Systems
, vol.12
, Issue.12
, pp. 1219-1235
-
-
Duato, J.1
Pinkston, T.M.2
-
38
-
-
44049092044
-
A Scalable Methodology for Computing Fault-Free Paths in Infiniband Torus Networks
-
J.M. Montañana, J. Flich, A. Robles, and J. Duato, "A Scalable Methodology for Computing Fault-Free Paths in Infiniband Torus Networks," Proc. Sixth Int'l Symp. High-Performance Computing, 2005.
-
(2005)
Proc. Sixth Int'l Symp. High-Performance Computing
-
-
Montañana, J.M.1
Flich, J.2
Robles, A.3
Duato, J.4
-
39
-
-
34047200126
-
Reachability-Based Fault-Tolerant Routing
-
J.M. Montañana, J. Flich, A. Robles, and J. Duato, "Reachability-Based Fault-Tolerant Routing," Proc. 12th Int'l Conf. Parallel and Distributed Systems, pp. 515-524, 2006.
-
(2006)
Proc. 12th Int'l Conf. Parallel and Distributed Systems
, pp. 515-524
-
-
Montañana, J.M.1
Flich, J.2
Robles, A.3
Duato, J.4
-
40
-
-
44049084320
-
-
InfiniBand Architecture Specification, InfiniBand Trade Assoc., 2000.
-
InfiniBand Architecture Specification, InfiniBand Trade Assoc., 2000.
-
-
-
-
41
-
-
84944731747
-
Evaluation of a Subnet Management Mechanism for InfiniBand Networks
-
A. Bermúdez, R. Casado, F.J. Quiles, and T.M. Pinkston, "Evaluation of a Subnet Management Mechanism for InfiniBand Networks," Proc. 32nd Int'l Conf. Parallel Processing, pp. 117-124, 2003.
-
(2003)
Proc. 32nd Int'l Conf. Parallel Processing
, pp. 117-124
-
-
Bermúdez, A.1
Casado, R.2
Quiles, F.J.3
Pinkston, T.M.4
-
42
-
-
33847762802
-
Layout-Aware Analysis of Networks-on-Chip and Traditional Interconnects for MPSoCs
-
F. Angiolini, P. Meloni, S.M. Carta, L. Raffo, and L. Benini, "Layout-Aware Analysis of Networks-on-Chip and Traditional Interconnects for MPSoCs," IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 26, no. 3, pp. 421-434, 2007.
-
(2007)
IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems
, vol.26
, Issue.3
, pp. 421-434
-
-
Angiolini, F.1
Meloni, P.2
Carta, S.M.3
Raffo, L.4
Benini, L.5
-
43
-
-
34147141277
-
Energy-Efficient Multiprocessor Systems-on-Chip for Embedded Computing: Exploring Programming Models and Their Architectural Support
-
May
-
F. Poletti, A. Poggiali, D. Bertozzi, L. Benini, P. Marchal, M. Loghi, and M. Poncino, "Energy-Efficient Multiprocessor Systems-on-Chip for Embedded Computing: Exploring Programming Models and Their Architectural Support," IEEE Trans. Computers, vol. 56, no. 5, pp. 606-621, May 2007.
-
(2007)
IEEE Trans. Computers
, vol.56
, Issue.5
, pp. 606-621
-
-
Poletti, F.1
Poggiali, A.2
Bertozzi, D.3
Benini, L.4
Marchal, P.5
Loghi, M.6
Poncino, M.7
|